Searched refs:CSR_MHPMCOUNTER14 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh374 CSR_MHPMCOUNTER14 = 0xC0E, enumerator in enum:RiscvISA::CSRIndex
545 {CSR_MHPMCOUNTER14, {"mhpmcounter14", MISCREG_HPMCOUNTER14}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h848 #define CSR_MHPMCOUNTER14 0xb0e macro
1340 DECLARE_CSR(mhpmcounter14, CSR_MHPMCOUNTER14)

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