Searched refs:CSR_HPMCOUNTER29 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh307 CSR_HPMCOUNTER29 = 0xC1D, enumerator in enum:RiscvISA::CSRIndex
479 {CSR_HPMCOUNTER29, {"hpmcounter29", MISCREG_HPMCOUNTER29}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h783 #define CSR_HPMCOUNTER29 0xc1d macro
1275 DECLARE_CSR(hpmcounter29, CSR_HPMCOUNTER29)

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