Searched refs:CSR_HPMCOUNTER12 (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh290 CSR_HPMCOUNTER12 = 0xC0C, enumerator in enum:RiscvISA::CSRIndex
462 {CSR_HPMCOUNTER12, {"hpmcounter12", MISCREG_HPMCOUNTER12}},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h766 #define CSR_HPMCOUNTER12 0xc0c macro
1258 DECLARE_CSR(hpmcounter12, CSR_HPMCOUNTER12)

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