Searched refs:CSR_FRM (Results 1 - 2 of 2) sorted by relevance

/gem5/src/arch/riscv/
H A Dregisters.hh276 CSR_FRM = 0x002, enumerator in enum:RiscvISA::CSRIndex
448 {CSR_FRM, {"frm", MISCREG_FRM}},
723 {CSR_FRM, FRM_MASK},
/gem5/tests/test-progs/asmtest/src/riscv/env/
H A Dencoding.h752 #define CSR_FRM 0x2 macro
1244 DECLARE_CSR(frm, CSR_FRM)

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