Searched refs:write (Results 351 - 375 of 747) sorted by relevance

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/gem5/src/systemc/tests/systemc/misc/stars/star109678/
H A Dstar109678.cpp62 outp.write(0);
87 outp2.write(0);
/gem5/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/
H A Ddata_gen.cpp96 data.write(mem[addr.read()]); // data = mem[addr]
100 addr.write(addr.read() + 1); // addr = addr + 1
H A Dreset_stim.cpp97 reset.write(0); // reset = 0
98 addr.write(1); // addr = 1
101 reset.write(1); // reset = 1
/gem5/src/systemc/ext/tlm_core/1/analysis/
H A Danalysis_port.hh63 write(const T &t) function in class:tlm::tlm_analysis_port
68 (*i)->write(t);
/gem5/src/systemc/ext/tlm_core/1/req_rsp/channels/fifo/
H A Dfifo_put_get.hh80 buffer.write(val_);
98 buffer.write(val_);
/gem5/src/mem/ruby/system/
H A DDMASequencer.hh44 DMARequest(uint64_t start_paddr, int len, bool write, int bytes_completed,
49 bool write; member in struct:DMARequest
/gem5/src/dev/sparc/
H A Ddtod.hh64 Tick write(PacketPtr pkt) override;
H A Dmm_disk.hh62 Tick write(PacketPtr pkt) override;
/gem5/src/systemc/ext/channel/
H A Dsc_fifo_out_if.hh52 virtual void write(const T &) = 0;
/gem5/src/systemc/tests/systemc/misc/sim_tests/cgen/
H A Dcgen.cpp78 data_o.write(i);
121 code_o.write(sum % num);
133 clock.write(1);
135 clock.write(0);
/gem5/src/systemc/tests/systemc/misc/sim_tests/cycle_dw8051_demo/
H A Dperipheral.cpp50 // write
59 mem_data_in.write( sc_bv<8>( buffer_out ) );
/gem5/src/systemc/tests/systemc/misc/unit/control/timing/
H A Drdy.h88 data.write(0); cout << " ready = 0 " << endl;
104 data.write(1); cout << " ready = 1 " << endl;
120 data.write(0); cout << " ready = 0 " << endl;
136 data.write(1); cout << " ready = 1 " << endl;
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.4/
H A Dstage3.cpp54 powr.write(c);
/gem5/ext/systemc/src/sysc/communication/
H A Dsc_signal_resolved.h85 // write the new value
86 virtual void write( const data_type& );
92 { write( a ); return *this; }
95 { write( a.read() ); return *this; }
/gem5/src/dev/net/
H A Detherdump.cc88 stream->write(reinterpret_cast<char *>(&hdr), sizeof(hdr));
101 stream->write(reinterpret_cast<char *>(&pkthdr), sizeof(pkthdr));
102 stream->write(reinterpret_cast<char *>(packet->data), pkthdr.caplen);
/gem5/src/systemc/channel/
H A Dsc_signal_resolved.cc51 sc_signal_resolved::write(const sc_dt::sc_logic &l) function in class:sc_core::sc_signal_resolved
68 write(l);
75 write(r.read());
/gem5/src/systemc/tests/systemc/bugs/async_reset_init/
H A Dasync_reset_init.cpp106 rst_sig.write(true);
117 rst_sig.write(false); // releasing reset
125 rst_sig.write(true); // entering reset
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.1/
H A Dmean.cpp76 // write all outputs
77 am.write(arith);
78 gm.write(geom);
79 hm.write(harmonic);
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.2/
H A Dmean.cpp79 // write all outputs
80 out.write(arith);
82 out.write(geom);
84 out.write(harmonic);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test01/
H A Dtest01.cpp107 clock.write(0);
110 clock.write(1);
112 clock.write(0);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test02/
H A Dtest02.cpp98 clock.write(0);
101 clock.write(1);
103 clock.write(0);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test03/
H A Dtest03.cpp105 clock.write(0);
108 clock.write(1);
110 clock.write(0);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test04/
H A Dtest04.cpp104 clock.write(0);
107 clock.write(1);
109 clock.write(0);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test05/
H A Dtest05.cpp105 clock.write(0);
108 clock.write(1);
110 clock.write(0);
/gem5/src/systemc/tests/systemc/tracing/vcd_trace/test07/
H A Dtest07.cpp102 clock.write(0);
105 clock.write(1);
107 clock.write(0);

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