Searched refs:sc_signal_bool_vector4 (Results 1 - 25 of 65) sorted by relevance

123

/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Ddisplay.h47 const sc_signal_bool_vector4& in_data2; // Input port
48 const sc_signal_bool_vector4& in_data3; // Input port
56 const sc_signal_bool_vector4& IN_DATA2,
57 const sc_signal_bool_vector4& IN_DATA3,
H A Daddition.h54 const sc_signal_bool_vector4& in_value2;
55 const sc_signal_bool_vector4& in_value3;
60 sc_signal_bool_vector4& out_value2;
61 sc_signal_bool_vector4& out_value3;
75 const sc_signal_bool_vector4& IN_VALUE2,
76 const sc_signal_bool_vector4& IN_VALUE3,
81 sc_signal_bool_vector4& OUT_VALUE2,
82 sc_signal_bool_vector4& OUT_VALUE3,
H A Dmain.cpp46 sc_signal_bool_vector4 stimulus_line2;
47 sc_signal_bool_vector4 stimulus_line3;
53 sc_signal_bool_vector4 result_line2;
54 sc_signal_bool_vector4 result_line3;
H A Dstimulus.h48 sc_signal_bool_vector4& out_stimulus2;
49 sc_signal_bool_vector4& out_stimulus3;
58 sc_signal_bool_vector4& OUT_STIMULUS2,
59 sc_signal_bool_vector4& OUT_STIMULUS3,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Ddisplay.h48 const sc_signal_bool_vector4& in_data2; // Input port
49 const sc_signal_bool_vector4& in_data3; // Input port
57 const sc_signal_bool_vector4& IN_DATA2,
58 const sc_signal_bool_vector4& IN_DATA3,
H A Ddivide.h49 const sc_signal_bool_vector4& in_value2; // Input port
50 const sc_signal_bool_vector4& in_value3; // Input port
55 sc_signal_bool_vector4& out_value2; // Output port
56 sc_signal_bool_vector4& out_value3; // Output port
70 const sc_signal_bool_vector4& IN_VALUE2,
71 const sc_signal_bool_vector4& IN_VALUE3,
76 sc_signal_bool_vector4& OUT_VALUE2,
77 sc_signal_bool_vector4& OUT_VALUE3,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Ddisplay.h48 const sc_signal_bool_vector4& in_data2; // Input port
49 const sc_signal_bool_vector4& in_data3; // Input port
57 const sc_signal_bool_vector4& IN_DATA2,
58 const sc_signal_bool_vector4& IN_DATA3,
H A Dmodulo.h55 const sc_signal_bool_vector4& in_value2; // Input port
56 const sc_signal_bool_vector4& in_value3; // Input port
61 sc_signal_bool_vector4& out_value2; // Output port
62 sc_signal_bool_vector4& out_value3; // Output port
76 const sc_signal_bool_vector4& IN_VALUE2,
77 const sc_signal_bool_vector4& IN_VALUE3,
82 sc_signal_bool_vector4& OUT_VALUE2,
83 sc_signal_bool_vector4& OUT_VALUE3,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Ddisplay.h48 const sc_signal_bool_vector4& in_data2; // Input port
49 const sc_signal_bool_vector4& in_data3; // Input port
57 const sc_signal_bool_vector4& IN_DATA2,
58 const sc_signal_bool_vector4& IN_DATA3,
H A Dmult.h55 const sc_signal_bool_vector4& in_value2; // Input port
56 const sc_signal_bool_vector4& in_value3; // Input port
61 sc_signal_bool_vector4& out_value2; // Output port
62 sc_signal_bool_vector4& out_value3; // Output port
76 const sc_signal_bool_vector4& IN_VALUE2,
77 const sc_signal_bool_vector4& IN_VALUE3,
82 sc_signal_bool_vector4& OUT_VALUE2,
83 sc_signal_bool_vector4& OUT_VALUE3,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Ddisplay.h48 const sc_signal_bool_vector4& in_data2; // Input port
49 const sc_signal_bool_vector4& in_data3; // Input port
57 const sc_signal_bool_vector4& IN_DATA2,
58 const sc_signal_bool_vector4& IN_DATA3,
H A Dsubtract.h49 const sc_signal_bool_vector4& in_value2;
50 const sc_signal_bool_vector4& in_value3;
55 sc_signal_bool_vector4& out_value2;
56 sc_signal_bool_vector4& out_value3;
70 const sc_signal_bool_vector4& IN_VALUE2,
71 const sc_signal_bool_vector4& IN_VALUE3,
76 sc_signal_bool_vector4& OUT_VALUE2,
77 sc_signal_bool_vector4& OUT_VALUE3,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Dbitwidth.h53 const sc_signal_bool_vector4& in_value1; // Input port
54 const sc_signal_bool_vector4& in_value2; // Input port
60 sc_signal_bool_vector4& out_value1; // Output port
61 sc_signal_bool_vector4& out_value2; // Output port
76 const sc_signal_bool_vector4& IN_VALUE1,
77 const sc_signal_bool_vector4& IN_VALUE2,
83 sc_signal_bool_vector4& OUT_VALUE1,
84 sc_signal_bool_vector4& OUT_VALUE2,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/
H A Dcommon.h44 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/and/datatypes/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/not/datatypes/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/shl/bitwidth/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef
H A Dbitwidth.h54 const sc_signal_bool_vector4& in_value1; // Input port
55 const sc_signal_bool_vector4& in_value2; // Input port
61 sc_signal_bool_vector4& out_value1; // Output port
62 sc_signal_bool_vector4& out_value2; // Output port
77 const sc_signal_bool_vector4& IN_VALUE1,
78 const sc_signal_bool_vector4& IN_VALUE2,
84 sc_signal_bool_vector4& OUT_VALUE1,
85 sc_signal_bool_vector4& OUT_VALUE2,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/bitwise/xor/datatypes/
H A Dcommon.h43 typedef sc_signal<sc_bv<4> > sc_signal_bool_vector4; typedef

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