Searched refs:sc_signal (Results 551 - 575 of 1041) sorted by relevance

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/gem5/src/systemc/tests/systemc/misc/unit/data/general/concat_port/
H A Dstimgen.h53 const sc_signal<bool>& done;
57 sc_signal<int>& mode;
58 sc_signal<bool>& ready;
65 const sc_signal<bool>& DONE,
68 sc_signal<int>& MODE,
69 sc_signal<bool>& READY )
/gem5/src/systemc/tests/systemc/communication/sc_signal/constructors/
H A Dtest01.cpp38 // sc_signal test;
47 sc_signal<T> sig1;
48 sc_signal<T> sig2( "sig2" );
49 sc_signal<T> sig3( "sig3", val );
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/
H A Dtestbench.h56 sc_signal<float>& RESULT,
57 sc_signal<bool>& RESET,
58 sc_signal<float>& SAMPLE )
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/
H A Dtestbench.h56 sc_signal<float>& RESULT,
57 sc_signal<bool>& RESET,
58 sc_signal<float>& SAMPLE )
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/
H A Dtestbench.h56 sc_signal<float>& RESULT,
57 sc_signal<bool>& RESET,
58 sc_signal<float>& SAMPLE )
/gem5/src/systemc/tests/systemc/misc/sim_tests/hshake2/
H A Dproc1.h56 sc_signal<bool>& DATA_ACK,
57 sc_signal<int>& DATA,
58 sc_signal<bool>& DATA_READY )
H A Dproc2.h56 sc_signal<bool>& DATA_READY,
57 sc_signal<int>& DATA,
58 sc_signal<bool>& DATA_ACK )
/gem5/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/
H A Dadd_chain_tb.h53 sc_signal<int> addr; // Address of input memory
54 sc_signal<bool> reset;
55 sc_signal<bool> ready;
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt3.1/
H A Dmain.cpp46 sc_signal<bool> handshake ("HS");
47 sc_signal<bool> found;
48 sc_signal<char> stream ("ST");
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.4/
H A Dstage3.cpp64 const sc_signal<double>& PROD,
65 const sc_signal<double>& QUOT,
66 sc_signal<double>& POWR)
/gem5/src/systemc/tests/systemc/tracing/wif_trace/pct1/
H A Dmonitor.h52 sc_signal<bool>& TX,
53 sc_signal<int>& DOUT,
54 sc_signal<bool>& WR )
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Ddisplay.h46 const sc_signal<int>& in_data1; // Input port
51 const sc_signal<bool>& in_valid;
55 const sc_signal<int>& IN_DATA1,
60 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/
H A Ddisplay.h47 const sc_signal<int>& in_data1; // Input port
52 const sc_signal<bool>& in_valid;
56 const sc_signal<int>& IN_DATA1,
61 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/
H A Ddisplay.h47 const sc_signal<int>& in_data1; // Input port
52 const sc_signal<bool>& in_valid;
56 const sc_signal<int>& IN_DATA1,
61 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/
H A Ddisplay.h47 const sc_signal<int>& in_data1; // Input port
52 const sc_signal<bool>& in_valid;
56 const sc_signal<int>& IN_DATA1,
61 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/
H A Ddisplay.h47 const sc_signal<int>& in_data1; // Input port
52 const sc_signal<bool>& in_valid;
56 const sc_signal<int>& IN_DATA1,
61 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/
H A Dstimulus.h47 sc_signal<bool>& reset;
51 sc_signal<bool>& input_valid;
55 sc_signal<bool>& RESET,
59 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/datatypes/
H A Dstimulus.h47 sc_signal<bool>& reset;
52 sc_signal<bool>& input_valid;
56 sc_signal<bool>& RESET,
61 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/
H A Dstimulus.h47 sc_signal<bool>& reset;
51 sc_signal<bool>& input_valid;
55 sc_signal<bool>& RESET,
59 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/
H A Dstimulus.h47 sc_signal<bool>& reset;
52 sc_signal<bool>& input_valid;
56 sc_signal<bool>& RESET,
61 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/
H A Dstimulus.h47 sc_signal<bool>& reset;
51 sc_signal<bool>& input_valid;
55 sc_signal<bool>& RESET,
59 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/
H A Ddisplay.h51 const sc_signal<int>& in_data5; // Input port
52 const sc_signal<bool>& in_valid;
60 const sc_signal<int>& IN_DATA5,
61 const sc_signal<bool>& IN_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/datatypes/
H A Dstimulus.h47 sc_signal<bool>& reset;
52 sc_signal<bool>& input_valid;
56 sc_signal<bool>& RESET,
61 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/
H A Dstimulus.h47 sc_signal<bool>& reset;
51 sc_signal<bool>& input_valid;
55 sc_signal<bool>& RESET,
59 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/
H A Ddisplay.h51 const sc_signal<int>& in_data5; // Input port
52 const sc_signal<bool>& in_valid;
60 const sc_signal<int>& IN_DATA5,
61 const sc_signal<bool>& IN_VALID

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