Searched refs:sc_signal (Results 526 - 550 of 1041) sorted by relevance

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/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/
H A Dfsm.h47 const sc_signal<bool>& reset ;
51 const sc_signal<bool>& in_valid;
55 sc_signal<bool>& out_valid1;
56 sc_signal<bool>& out_valid2;
57 sc_signal<bool>& out_valid3;
66 const sc_signal<bool>& RESET,
70 const sc_signal<bool>& IN_VALID,
74 sc_signal<bool>& OUT_VALID1,
75 sc_signal<bool>& OUT_VALID2,
76 sc_signal<boo
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/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/
H A Dbalancing.h47 const sc_signal<bool>& reset ;
51 const sc_signal<bool>& in_valid;
55 sc_signal<bool>& out_valid1;
56 sc_signal<bool>& out_valid2;
57 sc_signal<bool>& out_valid3;
66 const sc_signal<bool>& RESET,
70 const sc_signal<bool>& IN_VALID,
74 sc_signal<bool>& OUT_VALID1,
75 sc_signal<bool>& OUT_VALID2,
76 sc_signal<boo
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/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/conditions/
H A Dconditions.h47 const sc_signal<bool>& reset ;
52 const sc_signal<int>& in_value5 ;
53 const sc_signal<bool>& in_valid;
58 sc_signal<int>& out_value5;
59 sc_signal<bool>& out_valid;
68 const sc_signal<bool>& RESET,
73 const sc_signal<int>& IN_VALUE5,
74 const sc_signal<bool>& IN_VALID, // Input port
79 sc_signal<int>& OUT_VALUE5,
80 sc_signal<boo
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H A Dstimulus.h47 sc_signal<bool>& reset;
52 sc_signal<int>& stim5;
53 sc_signal<bool>& input_valid;
57 sc_signal<bool>& RESET,
62 sc_signal<int>& STIM5,
63 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/
H A Dfsm.h47 const sc_signal<bool>& reset ;
51 const sc_signal<bool>& in_valid;
55 sc_signal<bool>& out_valid1;
56 sc_signal<bool>& out_valid2;
57 sc_signal<bool>& out_valid3;
66 const sc_signal<bool>& RESET,
70 const sc_signal<bool>& IN_VALID,
74 sc_signal<bool>& OUT_VALID1,
75 sc_signal<bool>& OUT_VALID2,
76 sc_signal<boo
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/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/if_test/
H A Dif_test.h47 const sc_signal<bool>& reset ;
52 const sc_signal<int>& in_value5 ;
53 const sc_signal<bool>& in_valid;
58 sc_signal<int>& out_value5;
59 sc_signal<bool>& out_valid;
68 const sc_signal<bool>& RESET,
73 const sc_signal<int>& IN_VALUE5,
74 const sc_signal<bool>& IN_VALID, // Input port
79 sc_signal<int>& OUT_VALUE5,
80 sc_signal<boo
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H A Dstimulus.h47 sc_signal<bool>& reset;
52 sc_signal<int>& stim5;
53 sc_signal<bool>& input_valid;
57 sc_signal<bool>& RESET,
62 sc_signal<int>& STIM5,
63 sc_signal<bool>& INPUT_VALID
/gem5/src/systemc/tests/systemc/misc/stars/star111004/
H A Dio_controller.h111 sc_signal<sc_uint<32> > mux_data32;
112 sc_signal<sc_uint<32> > in_fifo_data32;
113 sc_signal<sc_uint<32> > out_fifo_data32;
114 sc_signal<sc_uint<32> > control_data32;
115 sc_signal<bool> out_fifo_en;
116 sc_signal<bool> out_fifo_act;
117 sc_signal<bool> in_fifo_en;
118 sc_signal<bool> control_en;
119 sc_signal<bool> out_fifo_reset;
124 sc_signal<boo
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/gem5/src/systemc/tests/systemc/misc/synth/blast/blast3/
H A Dblast3.cpp46 const sc_signal<bool>& reset;
47 sc_signal<bool>& ready;
48 const sc_signal<char>& a;
49 const sc_signal<char>& b;
50 sc_signal<short>& c;
57 const sc_signal<bool>& RESET,
58 sc_signal<bool>& READY,
59 const sc_signal<char>& A,
60 const sc_signal<char>& B,
61 sc_signal<shor
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/gem5/src/systemc/tests/systemc/misc/synth/gcd/
H A Dgcd.cpp46 const sc_signal<bool>& reset;
47 const sc_signal<unsigned>& a;
48 const sc_signal<unsigned>& b;
49 sc_signal<unsigned>& c;
50 sc_signal<bool>& ready;
54 const sc_signal<bool>& RESET,
55 const sc_signal<unsigned>& A,
56 const sc_signal<unsigned>& B,
57 sc_signal<unsigned>& C,
58 sc_signal<boo
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/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Dstimulus.h46 sc_signal<bool>& reset;
47 sc_signal<int>& out_stimulus1;
52 sc_signal<bool>& out_valid;
56 sc_signal<bool>& RESET,
57 sc_signal<int>& OUT_STIMULUS1,
62 sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/datatypes/
H A Dstimulus.h47 sc_signal<bool>& reset ;
52 sc_signal<bool>& out_valid; // Output port
53 const sc_signal<bool>& in_ack;
62 sc_signal<bool>& RESET,
67 sc_signal<bool>& OUT_VALID,
68 const sc_signal<bool>& IN_ACK
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/divide/divide/
H A Dstimulus.h47 sc_signal<bool>& reset;
48 sc_signal<int>& out_stimulus1;
53 sc_signal<bool>& out_valid;
57 sc_signal<bool>& RESET,
58 sc_signal<int>& OUT_STIMULUS1,
63 sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/modulo/
H A Dstimulus.h47 sc_signal<bool>& reset;
48 sc_signal<int>& out_stimulus1;
53 sc_signal<bool>& out_valid;
57 sc_signal<bool>& RESET,
58 sc_signal<int>& OUT_STIMULUS1,
63 sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/mult/
H A Dstimulus.h47 sc_signal<bool>& reset;
48 sc_signal<int>& out_stimulus1;
53 sc_signal<bool>& out_valid;
57 sc_signal<bool>& RESET,
58 sc_signal<int>& OUT_STIMULUS1,
63 sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/bitwidth/
H A Dstimulus.h47 sc_signal<bool>& reset ;
52 sc_signal<bool>& out_valid; // Output port
53 const sc_signal<bool>& in_ack;
62 sc_signal<bool>& RESET,
67 sc_signal<bool>& OUT_VALID,
68 const sc_signal<bool>& IN_ACK
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/
H A Dstimulus.h47 sc_signal<bool>& reset;
53 sc_signal<bool>& out_valid; // Output port
54 const sc_signal<bool>& in_ack;
63 sc_signal<bool>& RESET,
69 sc_signal<bool>& OUT_VALID,
70 const sc_signal<bool>& IN_ACK
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/subtract/
H A Dstimulus.h47 sc_signal<bool>& reset;
48 sc_signal<int>& out_stimulus1;
53 sc_signal<bool>& out_valid;
57 sc_signal<bool>& RESET,
58 sc_signal<int>& OUT_STIMULUS1,
63 sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/inlining/
H A Dinlining.h47 const sc_signal<bool>& reset ;
52 const sc_signal<bool>& in_valid;
55 sc_signal<bool>& out_valid;
64 const sc_signal<bool>& RESET,
69 const sc_signal<bool>& IN_VALID, // Input port
72 sc_signal<bool>& OUT_VALID // Input port
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/inlining/
H A Dinlining.h47 const sc_signal<bool>& reset ;
52 const sc_signal<bool>& in_valid;
55 sc_signal<bool>& out_valid;
64 const sc_signal<bool>& RESET,
69 const sc_signal<bool>& IN_VALID, // Input port
72 sc_signal<bool>& OUT_VALID // Input port
/gem5/src/systemc/tests/systemc/misc/examples/parsing/
H A Dactiva.cpp46 const sc_signal<unsigned>& a;
47 const sc_signal<unsigned>& b;
48 sc_signal<unsigned>& c;
52 const sc_signal<unsigned>& A,
53 const sc_signal<unsigned>& B,
54 sc_signal<unsigned>& C )
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/
H A Dmain.cpp49 sc_signal<float> sample;
50 sc_signal<float> result;
51 sc_signal<float> delayed_out;
52 sc_signal<float> final_out;
53 sc_signal<bool> reset;
54 sc_signal<bool> pop;
/gem5/src/systemc/tests/systemc/misc/synth/add_chain/
H A Dreset_stim.h52 sc_signal<bool>& ready;
53 sc_signal<bool>& reset;
54 sc_signal<int>& addr;
59 sc_signal<bool>& READY,
60 sc_signal<bool>& RESET,
61 sc_signal<int>& ADDR )
/gem5/src/systemc/tests/systemc/misc/synth/add_chain_FUNC/
H A Ddata_gen.cpp52 const sc_signal<bool>& ready;
54 sc_signal<int>& addr;
59 const sc_signal<bool>& READY,
61 sc_signal<int>& ADDR )
108 const sc_signal<bool>& READY,
110 sc_signal<int>& ADDR )
/gem5/src/systemc/tests/systemc/misc/unit/data/general/concat_port/
H A Dconcat_port.h53 const sc_signal<int>& mode;
54 const sc_signal<bool>& ready;
58 sc_signal<bool>& done;
65 const sc_signal<int>& MODE,
66 const sc_signal<bool>& READY,
69 sc_signal<bool>& DONE )

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