Searched refs:sc_signal (Results 326 - 350 of 1041) sorted by relevance

<<11121314151617181920>>

/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/promote_truncation/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector6> signal_bool_vector6;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_signed/truncation/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector6> signal_bool_vector6;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/bits_to_bits/
H A Dcommon.h46 typedef sc_signal<bool_vector6> signal_bool_vector6;
47 typedef sc_signal<bool_vector7> signal_bool_vector7;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/extension/
H A Dcommon.h46 typedef sc_signal<bool_vector6> signal_bool_vector6;
47 typedef sc_signal<bool_vector9> signal_bool_vector9;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_lost_carry/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector6> signal_bool_vector6;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/promote_truncation/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector6> signal_bool_vector6;
/gem5/src/systemc/tests/systemc/misc/unit/data/datawidth_bool_to_unsigned/truncation/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector6> signal_bool_vector6;
/gem5/src/systemc/tests/systemc/misc/unit/data/general/add_promote/
H A Dcommon.h45 typedef sc_signal<bool_vector6> sc_signal_bool_vector6;
46 typedef sc_signal<bool_vector7> sc_signal_bool_vector7;
/gem5/src/systemc/tests/systemc/misc/unit/data/general/array_range/
H A Dcommon.h46 typedef sc_signal<bool_vector4> signal_bool_vector4;
47 typedef sc_signal<bool_vector8> signal_bool_vector8;
/gem5/src/systemc/tests/systemc/misc/unit/data/general/concat_port/
H A Dcommon.h45 typedef sc_signal<bool_vector8> signal_bool_vector8;
46 typedef sc_signal<bool_vector16> signal_bool_vector16;
/gem5/src/systemc/tests/systemc/misc/unit/data/general/datawidth_int/
H A Ddatawidth.h51 const sc_signal<int>& in1;
52 const sc_signal<int>& in2;
53 const sc_signal<bool>& ready;
55 sc_signal<int>& result;
60 const sc_signal<int>& IN1,
61 const sc_signal<int>& IN2,
62 const sc_signal<bool>& READY,
63 sc_signal<int>& RESULT )
H A Dstimgen.h51 const sc_signal<int>& result;
53 sc_signal<int>& in1;
54 sc_signal<int>& in2;
55 sc_signal<bool>& ready;
60 const sc_signal<int>& RESULT,
61 sc_signal<int>& IN1,
62 sc_signal<int>& IN2,
63 sc_signal<bool>& READY )
/gem5/src/systemc/tests/systemc/misc/unit/data/general/promote_add/
H A Dcommon.h45 typedef sc_signal<bool_vector6> sc_signal_bool_vector6;
46 typedef sc_signal<bool_vector7> sc_signal_bool_vector7;
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.1/
H A Dstage1.h49 const sc_signal<double>& in1; //input
50 const sc_signal<double>& in2; //input
51 sc_signal<double>& sum; //output
52 sc_signal<double>& diff; //output
57 const sc_signal<double>& IN1,
58 const sc_signal<double>& IN2,
59 sc_signal<double>& SUM,
60 sc_signal<double>& DIFF)
H A Dstage2.h49 const sc_signal<double>& sum; //input
50 const sc_signal<double>& diff; //input
51 sc_signal<double>& prod; //output
52 sc_signal<double>& quot; //output
57 const sc_signal<double>& SUM,
58 const sc_signal<double>& DIFF,
59 sc_signal<double>& PROD,
60 sc_signal<double>& QUOT)
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.2/
H A Dstage1.h49 const sc_signal<double>& in1; //input
50 const sc_signal<double>& in2; //input
51 sc_signal<double>& sum; //output
52 sc_signal<double>& diff; //output
57 const sc_signal<double>& IN1,
58 const sc_signal<double>& IN2,
59 sc_signal<double>& SUM,
60 sc_signal<double>& DIFF)
H A Dstage2.h49 const sc_signal<double>& sum; //input
50 const sc_signal<double>& diff; //input
51 sc_signal<double>& prod; //output
52 sc_signal<double>& quot; //output
57 const sc_signal<double>& SUM,
58 const sc_signal<double>& DIFF,
59 sc_signal<double>& PROD,
60 sc_signal<double>& QUOT)
/gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.4/
H A Dstage1.h49 const sc_signal<double>& in1; //input
50 const sc_signal<double>& in2; //input
51 sc_signal<double>& sum; //output
52 sc_signal<double>& diff; //output
57 const sc_signal<double>& IN1,
58 const sc_signal<double>& IN2,
59 sc_signal<double>& SUM,
60 sc_signal<double>& DIFF)
H A Dstage2.h49 const sc_signal<double>& sum; //input
50 const sc_signal<double>& diff; //input
51 sc_signal<double>& prod; //output
52 sc_signal<double>& quot; //output
57 const sc_signal<double>& SUM,
58 const sc_signal<double>& DIFF,
59 sc_signal<double>& PROD,
60 sc_signal<double>& QUOT)
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/
H A Ddisplay.h47 const sc_signal<int>& result; // Input port
48 const sc_signal<bool>& out_valid;
52 const sc_signal<int>& RESULT,
53 const sc_signal<bool>& OUT_VALID

Completed in 20 milliseconds

<<11121314151617181920>>