Searched refs:reset (Results 51 - 75 of 607) sorted by relevance

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/gem5/src/systemc/tests/systemc/kernel/sc_object_manager/test02/
H A Dtest02.cpp81 sc_signal<bool> reset; local
84 dut.m_reset(reset);
86 reset = true;
88 reset = false;
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/sharing/
H A Dmain.cpp45 sc_signal<bool> reset; local
62 reset = 0;
69 reset,
80 reset,
/gem5/src/systemc/tests/systemc/misc/synth/add_chain/
H A Dreset_stim.h53 sc_signal<bool>& reset; local
65 reset (RESET),
94 // INITIALIZE reset AND addr, THEN REMOVE RESET AFTER 2 CLOCK CYCLES
96 reset.write(0); // reset = 0
100 reset.write(1); // reset = 1
/gem5/src/mem/cache/replacement_policies/
H A Dbip_rp.hh79 * @param replacement_data Replacement data to be reset.
81 void reset(const std::shared_ptr<ReplacementData>& replacement_data) const
/gem5/src/systemc/ext/core/
H A Dsc_simcontext.hh43 void reset();
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/increment/
H A Dstimulus.cpp45 // sending some reset values
46 reset.write(true);
52 reset.write(false);
H A Dincrement.h52 const sc_signal<bool>& reset ; local
76 reset (RESET),
87 reset_signal_is(reset,true);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/subtract/decrement/
H A Dstimulus.cpp43 reset.write(true);
45 reset.write(false);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/balancing/
H A Dstimulus.cpp45 // sending some reset values
46 reset.write(true);
51 reset.write(false);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/case/fsm/
H A Dstimulus.cpp45 // sending some reset values
46 reset.write(true);
51 reset.write(false);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/balancing/
H A Dstimulus.cpp45 // sending some reset values
46 reset.write(true);
51 reset.write(false);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/if_test/fsm/
H A Dstimulus.cpp45 // sending some reset values
46 reset.write(true);
51 reset.write(false);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_datatypes/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_exit/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/for_fsm/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_datatypes/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_exit/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/cae_test/general/control/loop/while_fsm/
H A Dstimulus.h47 sc_signal<bool>& reset; local
58 reset (RESET),
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad1/
H A Dtestbench.h50 sc_out<bool> reset; local
62 reset(RESET);
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad2/
H A Dtestbench.h50 sc_out<bool> reset; local
61 result(RESULT); reset(RESET); sample(SAMPLE);
/gem5/src/systemc/tests/systemc/misc/sim_tests/biquad/biquad3/
H A Dtestbench.h50 sc_out<bool> reset; local
61 result(RESULT); reset(RESET); sample(SAMPLE);
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/addition/
H A Dmain.cpp44 sc_signal<bool> reset; local
60 reset,
70 reset,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/bitwidth/
H A Dmain.cpp44 sc_signal<bool> reset; local
62 reset,
73 reset,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/datatypes/
H A Dmain.cpp44 sc_signal<bool> reset; local
65 reset,
77 reset,
/gem5/src/systemc/tests/systemc/misc/cae_test/general/arith/addition/sharing/
H A Dmain.cpp44 sc_signal<bool> reset; local
60 reset,
70 reset,

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