Searched refs:ctx (Results 26 - 33 of 33) sorted by relevance
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/gem5/src/sim/ |
H A D | arguments.hh | 64 Arguments(ThreadContext *ctx, int n = 0) argument 65 : tc(ctx), number(n), data(new Data())
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/gem5/src/arch/riscv/ |
H A D | process.cc | 104 for (ContextID ctx: contextIds) 105 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U); 114 for (ContextID ctx: contextIds) { 115 system->getThreadContext(ctx)->setMiscRegNoEffect(MISCREG_PRV, PRV_U); 116 PCState pc = system->getThreadContext(ctx)->pcState(); 118 system->getThreadContext(ctx)->pcState(pc);
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/gem5/src/systemc/tests/systemc/utils/sc_report/cached/ |
H A D | cached.cpp | 76 void dump_cached_report(const char* ctx) argument 80 << " from context '" << ctx << "' ";
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/gem5/src/cpu/kvm/ |
H A D | vm.hh | 421 long contextIdToVCpuId(ContextID ctx) const;
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H A D | vm.cc | 540 KvmVM::contextIdToVCpuId(ContextID ctx) const 544 (system->getThreadContext(ctx)->getCpuPtr())->getVCpuID();
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/gem5/src/arch/sparc/ |
H A D | tlb.hh | 181 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
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H A D | tlb.cc | 402 DPRINTF(TLB, "TLB: Writing Tag Access: va: %#X ctx: %#X value: %#X\n", 1300 TLB::GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs) argument 1302 uint64_t tag_access = mbits(addr,63,13) | mbits(ctx,12,0);
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/gem5/src/mem/ |
H A D | abstract_mem.cc | 292 ThreadContext* ctx = system()->getThreadContext(owner_cid); local 293 TheISA::globalClearExclusive(ctx);
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