/gem5/src/dev/net/ |
H A D | etherdevice.hh | 65 Stats::Scalar txBytes; 66 Stats::Scalar rxBytes; 67 Stats::Scalar txPackets; 68 Stats::Scalar rxPackets; 69 Stats::Scalar txIpChecksums; 70 Stats::Scalar rxIpChecksums; 71 Stats::Scalar txTcpChecksums; 72 Stats::Scalar rxTcpChecksums; 73 Stats::Scalar txUdpChecksums; 74 Stats [all...] |
/gem5/src/sim/ |
H A D | stats.hh | 36 extern Stats::Formula simSeconds; 37 extern Stats::Value simTicks; 38 extern Stats::Value simFreq;
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H A D | stat_register.hh | 42 * Stats */ 47 namespace Stats namespace 53 } // namespace Stats
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H A D | stat_register.cc | 44 namespace Stats namespace 55 } // namespace Stats
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/gem5/src/cpu/minor/ |
H A D | stats.hh | 61 Stats::Scalar numInsts; 64 Stats::Scalar numOps; 67 Stats::Scalar numDiscardedOps; 70 Stats::Scalar numFetchSuspends; 73 Stats::Scalar quiesceCycles; 76 Stats::Formula cpi; 77 Stats::Formula ipc; 80 Stats::Vector2d committedInstType;
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/gem5/util/systemc/gem5_within_systemc/ |
H A D | stats.cc | 47 * Register with: Stats::registerHandlers(statsReset, statsDump) 60 std::list<Stats::Info *> stats = Stats::statsList(); 64 Stats::Info *stat = *i; 65 Stats::VectorInfo *vector = dynamic_cast<Stats::VectorInfo *>(stat); 67 (dynamic_cast<Stats::VectorInfo *>(*i))->prepare(); 79 Stats::Output *output = Stats::initText(filename, desc); 81 Stats [all...] |
/gem5/src/python/pybind11/ |
H A D | stats.cc | 60 namespace Stats { namespace 84 .def("initSimStats", &Stats::initSimStats) 85 .def("initText", &Stats::initText, py::return_value_policy::reference) 87 .def("initHDF5", &Stats::initHDF5) 90 &Stats::registerPythonStatsHandlers) 91 .def("schedStatEvent", &Stats::schedStatEvent) 92 .def("periodicStatDump", &Stats::periodicStatDump) 93 .def("updateEvents", &Stats::updateEvents) 94 .def("processResetQueue", &Stats::processResetQueue) 95 .def("processDumpQueue", &Stats [all...] |
/gem5/src/mem/ruby/profiler/ |
H A D | Profiler.hh | 93 Stats::Histogram delayHistogram; 94 std::vector<Stats::Histogram *> delayVCHistogram; 97 Stats::Histogram m_outstandReqHistSeqr; 98 Stats::Histogram m_outstandReqHistCoalsr; 101 Stats::Histogram m_latencyHistSeqr; 102 Stats::Histogram m_latencyHistCoalsr; 103 std::vector<Stats::Histogram *> m_typeLatencyHistSeqr; 104 std::vector<Stats::Histogram *> m_typeLatencyHistCoalsr; 108 Stats::Histogram m_hitLatencyHistSeqr; 109 std::vector<Stats [all...] |
H A D | Profiler.cc | 118 .flags(Stats::nozero | Stats::pdf | Stats::oneline); 121 delayVCHistogram.push_back(new Stats::Histogram()); 126 .flags(Stats::nozero | Stats::pdf | Stats::oneline); 133 .flags(Stats::nozero | Stats::pdf | Stats [all...] |
/gem5/src/mem/probes/ |
H A D | stack_dist.hh | 72 Stats::Histogram readLinearHist; 75 Stats::SparseHistogram readLogHist; 78 Stats::Histogram writeLinearHist; 81 Stats::SparseHistogram writeLogHist; 84 Stats::Scalar infiniteSD;
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H A D | mem_footprint.hh | 78 Stats::Scalar fpCacheLine; 80 Stats::Scalar fpCacheLineTotal; 82 Stats::Scalar fpPage; 84 Stats::Scalar fpPageTotal;
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/gem5/util/cxx_config/ |
H A D | stats.cc | 45 * Register with: Stats::registerHandlers(statsReset, statsDump) 56 std::list<Stats::Info *> stats = Stats::statsList(); 65 std::cerr << "Stats dump\n"; 67 Stats::processDumpQueue(); 69 std::list<Stats::Info *> stats = Stats::statsList(); 75 Stats::Info *stat = *i; 77 Stats::ScalarInfo *scalar = dynamic_cast<Stats [all...] |
/gem5/src/arch/alpha/ |
H A D | kernel_stats.hh | 61 Stats::Vector _callpal; 63 Stats::Scalar _hwrei; 65 Stats::Vector _mode; 66 Stats::Vector _modeGood; 67 Stats::Formula _modeFraction; 68 Stats::Vector _modeTicks; 70 Stats::Scalar _swap_context; 72 Stats::Vector _iplCount; 73 Stats::Vector _iplGood; 74 Stats [all...] |
H A D | tlb.hh | 56 mutable Stats::Scalar fetch_hits; 57 mutable Stats::Scalar fetch_misses; 58 mutable Stats::Scalar fetch_acv; 59 mutable Stats::Formula fetch_accesses; 60 mutable Stats::Scalar read_hits; 61 mutable Stats::Scalar read_misses; 62 mutable Stats::Scalar read_acv; 63 mutable Stats::Scalar read_accesses; 64 mutable Stats::Scalar write_hits; 65 mutable Stats [all...] |
/gem5/src/mem/ |
H A D | dram_ctrl.hh | 314 Stats::Scalar actEnergy; 315 Stats::Scalar preEnergy; 316 Stats::Scalar readEnergy; 317 Stats::Scalar writeEnergy; 318 Stats::Scalar refreshEnergy; 323 Stats::Scalar actBackEnergy; 328 Stats::Scalar preBackEnergy; 333 Stats::Scalar actPowerDownEnergy; 338 Stats::Scalar prePowerDownEnergy; 343 Stats [all...] |
H A D | comm_monitor.hh | 276 /** Stats declarations, all in a struct for convenience. */ 277 struct MonitorStats : public Stats::Group 283 Stats::Histogram readBurstLengthHist; 286 Stats::Histogram writeBurstLengthHist; 296 Stats::Histogram readBandwidthHist; 297 Stats::Scalar totalReadBytes; 298 Stats::Formula averageReadBandwidth; 305 Stats::Histogram writeBandwidthHist; 306 Stats::Scalar totalWrittenBytes; 307 Stats [all...] |
/gem5/src/mem/ruby/network/garnet2.0/ |
H A D | GarnetNetwork.hh | 104 // Stats 158 Stats::Vector m_packets_received; 159 Stats::Vector m_packets_injected; 160 Stats::Vector m_packet_network_latency; 161 Stats::Vector m_packet_queueing_latency; 163 Stats::Formula m_avg_packet_vnet_latency; 164 Stats::Formula m_avg_packet_vqueue_latency; 165 Stats::Formula m_avg_packet_network_latency; 166 Stats::Formula m_avg_packet_queueing_latency; 167 Stats [all...] |
/gem5/src/mem/ruby/system/ |
H A D | Sequencer.hh | 105 Stats::Histogram& getOutstandReqHist() { return m_outstandReqHist; } 107 Stats::Histogram& getLatencyHist() { return m_latencyHist; } 108 Stats::Histogram& getTypeLatencyHist(uint32_t t) 111 Stats::Histogram& getHitLatencyHist() { return m_hitLatencyHist; } 112 Stats::Histogram& getHitTypeLatencyHist(uint32_t t) 115 Stats::Histogram& getHitMachLatencyHist(uint32_t t) 118 Stats::Histogram& getHitTypeMachLatencyHist(uint32_t r, uint32_t t) 121 Stats::Histogram& getMissLatencyHist() 123 Stats::Histogram& getMissTypeLatencyHist(uint32_t t) 126 Stats [all...] |
H A D | GPUCoalescer.hh | 191 Stats::Histogram& getOutstandReqHist() { return m_outstandReqHist; } 193 Stats::Histogram& getLatencyHist() { return m_latencyHist; } 194 Stats::Histogram& getTypeLatencyHist(uint32_t t) 197 Stats::Histogram& getMissLatencyHist() 199 Stats::Histogram& getMissTypeLatencyHist(uint32_t t) 202 Stats::Histogram& getMissMachLatencyHist(uint32_t t) const 205 Stats::Histogram& 209 Stats::Histogram& getIssueToInitialDelayHist(uint32_t t) const 212 Stats::Histogram& 216 Stats [all...] |
/gem5/src/arch/mips/ |
H A D | tlb.hh | 70 mutable Stats::Scalar read_hits; 71 mutable Stats::Scalar read_misses; 72 mutable Stats::Scalar read_acv; 73 mutable Stats::Scalar read_accesses; 74 mutable Stats::Scalar write_hits; 75 mutable Stats::Scalar write_misses; 76 mutable Stats::Scalar write_acv; 77 mutable Stats::Scalar write_accesses; 78 Stats::Formula hits; 79 Stats [all...] |
/gem5/src/arch/riscv/ |
H A D | tlb.hh | 69 mutable Stats::Scalar read_hits; 70 mutable Stats::Scalar read_misses; 71 mutable Stats::Scalar read_acv; 72 mutable Stats::Scalar read_accesses; 73 mutable Stats::Scalar write_hits; 74 mutable Stats::Scalar write_misses; 75 mutable Stats::Scalar write_acv; 76 mutable Stats::Scalar write_accesses; 77 Stats::Formula hits; 78 Stats [all...] |
/gem5/src/cpu/o3/ |
H A D | iew.hh | 422 Stats::Scalar iewIdleCycles; 424 Stats::Scalar iewSquashCycles; 426 Stats::Scalar iewBlockCycles; 428 Stats::Scalar iewUnblockCycles; 430 Stats::Scalar iewDispatchedInsts; 432 Stats::Scalar iewDispSquashedInsts; 434 Stats::Scalar iewDispLoadInsts; 436 Stats::Scalar iewDispStoreInsts; 438 Stats::Scalar iewDispNonSpecInsts; 440 Stats [all...] |
H A D | inst_queue.hh | 480 Stats::Scalar iqInstsAdded; 482 Stats::Scalar iqNonSpecInstsAdded; 484 Stats::Scalar iqInstsIssued; 486 Stats::Scalar iqIntInstsIssued; 488 Stats::Scalar iqFloatInstsIssued; 490 Stats::Scalar iqBranchInstsIssued; 492 Stats::Scalar iqMemInstsIssued; 494 Stats::Scalar iqMiscInstsIssued; 496 Stats::Scalar iqSquashedInstsIssued; 498 Stats [all...] |
/gem5/src/gpu-compute/ |
H A D | exec_stage.hh | 81 Stats::Scalar numCyclesWithNoIssue; 83 Stats::Scalar numCyclesWithInstrIssued; 86 Stats::Vector numCyclesWithInstrTypeIssued; 90 Stats::Vector numCyclesWithNoInstrTypeIssued; 92 Stats::Distribution spc; 123 Stats::Scalar numTransActiveIdle; 124 Stats::Distribution idleDur;
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/gem5/src/mem/cache/tags/ |
H A D | base.hh | 113 Stats::Average tagsInUse; 116 Stats::Scalar totalRefs; 123 Stats::Scalar sampledRefs; 129 Stats::Formula avgRefs; 132 Stats::Scalar warmupCycle; 135 Stats::AverageVector occupancies; 138 Stats::Formula avgOccs; 141 Stats::Vector occupanciesTaskId; 144 Stats::Vector2d ageTaskId; 147 Stats [all...] |