Searched refs:READY (Results 101 - 111 of 111) sorted by relevance
12345
| /gem5/src/systemc/tests/systemc/misc/communication/channel/hshake1/ |
| H A D | hshake1.cpp | 57 sc_fifo<bool>& READY )
58 : in(IN_), done(DONE), out(OUT_), ready(READY)
95 sc_fifo<bool>& READY )
96 : in(IN_), done(DONE), out(OUT_), ready(READY)
|
| /gem5/src/systemc/tests/systemc/misc/communication/channel/hshake2/ |
| H A D | hshake2.cpp | 57 sc_fifo<bool>& READY )
58 : in(IN_), done(DONE), out(OUT_), ready(READY)
95 sc_fifo<bool>& READY)
96 : in(IN_), done(DONE), out(OUT_), ready(READY)
90 proc2( sc_module_name NAME, sc_clock& CLOCK, sc_fifo<int>& IN_, sc_fifo<bool>& DONE, sc_fifo<int>& OUT_, sc_fifo<bool>& READY) argument
|
| /gem5/src/systemc/tests/systemc/misc/v1.0/resolved_sig/ |
| H A D | resolved_sig.cpp | 62 sc_signal<bool>& READY,
70 ready( READY );
98 sc_signal<bool>& READY,
106 ready( READY );
57 stimgen( sc_module_name NAME, sc_clock& TICK, sc_signal<int>& RESULT, sc_signal<int>& IN1, sc_signal<int>& IN2, sc_signal<bool>& READY, sc_signal_rv<8>& BUS ) argument
94 datawidth( sc_module_name NAME, sc_clock& TICK, sc_signal<int>& IN1, sc_signal<int>& IN2, sc_signal<bool>& READY, sc_signal<int>& RESULT, sc_signal_rv<8>& BUS ) argument
|
| /gem5/src/systemc/tests/systemc/misc/synth/blast/blast3/ |
| H A D | blast3.cpp | 58 sc_signal<bool>& READY,
63 reset(RESET), ready(READY),
55 array( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, sc_signal<bool>& READY, const sc_signal<char>& A, const sc_signal<char>& B, sc_signal<short>& C ) argument
|
| /gem5/src/systemc/tests/systemc/misc/synth/gcd/ |
| H A D | gcd.cpp | 58 sc_signal<bool>& READY )
64 ready(READY)
|
| /gem5/src/gpu-compute/ |
| H A D | scoreboard_check_stage.cc | 149 waveStatusList[unitId]->at(wvId).second = READY;
156 waveStatusList[unitId]->at(wvId).second = READY;
159 waveStatusList[unitId]->at(wvId).second = READY;
162 waveStatusList[unitId]->at(wvId).second = READY;
165 waveStatusList[unitId]->at(wvId).second = READY;
|
| H A D | scoreboard_check_stage.hh | 53 READY enumerator in enum:WAVE_STATUS
97 // Stores the status of waves. A READY implies the
|
| H A D | schedule_stage.cc | 105 // used in the model. I am setting it to READY
109 .second = READY;
|
| /gem5/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_blast/ |
| H A D | pr-207_blast.cpp | 67 sig_bool& READY
78 ready(READY)
|
| /gem5/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_mem/ |
| H A D | pr-207_mem.cpp | 66 sig_bool& READY
77 ready(READY)
|
| /gem5/src/systemc/tests/systemc/misc/synth/synth_gnats/pr-207/pr-207_rf/ |
| H A D | pr-207_rf.cpp | 66 sig_bool& READY
77 ready(READY)
|
Completed in 12 milliseconds
12345