Searched hist:9401 (Results 1 - 4 of 4) sorted by relevance
| /gem5/src/cpu/ | ||
| H A D | inst_pb_trace.cc | diff 12619:00be589dbe16 Tue Mar 27 03:26:00 EDT 2018 Gabe Black <gabeblack@google.com> cpu: Stop extracting inst_flags from the machInst. The instruction representation is already encoded in the trace protobuf, so there's no reason to encode a part of it again. This is especially true since this supposedly generic code is extracting the first 8 bits of the machInst, a totally arbitrary set of bits for most ISAs. If certain bits within a machine instruction are actually relevant, the consumer of the trace should be able to interpret the instruction bytes which are already there and extract the same bits within the context of whatever ISA they're appropriate for. Change-Id: Idaebe6a110d7d4812c3d7c434582d5a9470bcec1 Reviewed-on: https://gem5-review.googlesource.com/9401 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/src/proto/ | ||
| H A D | inst.proto | diff 12619:00be589dbe16 Tue Mar 27 03:26:00 EDT 2018 Gabe Black <gabeblack@google.com> cpu: Stop extracting inst_flags from the machInst. The instruction representation is already encoded in the trace protobuf, so there's no reason to encode a part of it again. This is especially true since this supposedly generic code is extracting the first 8 bits of the machInst, a totally arbitrary set of bits for most ISAs. If certain bits within a machine instruction are actually relevant, the consumer of the trace should be able to interpret the instruction bytes which are already there and extract the same bits within the context of whatever ISA they're appropriate for. Change-Id: Idaebe6a110d7d4812c3d7c434582d5a9470bcec1 Reviewed-on: https://gem5-review.googlesource.com/9401 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com> |
| /gem5/tests/ | ||
| H A D | run.py | diff 9401:9f0918fbb07f Mon Jan 07 13:05:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> tests: Add support for skipping tests, skip EIO tests if not enabled The EIO tests depend on the EIO support from the "encumbered" repository, which means that they are not normally built with gem5. This causes all EIO related tests to fail, which is both annoying and confusing. This patch addresses this by adding support for skipping tests if certain conditions (e.g., the presence of a SimObject) can not be met. It introduces the following Python functions that can be called from within a test case: * skip_test -- Skip a test and optionally print why the test was skipped. * has_sim_object -- Test if a SimObject exists. * require_sim_object -- Test if a SimObject exists and skip, or optionally fail, the test if not. Additionally, this patch updates the EIO tests to check for the presence of EioProcess. |
| H A D | SConscript | diff 9401:9f0918fbb07f Mon Jan 07 13:05:00 EST 2013 Andreas Sandberg <Andreas.Sandberg@ARM.com> tests: Add support for skipping tests, skip EIO tests if not enabled The EIO tests depend on the EIO support from the "encumbered" repository, which means that they are not normally built with gem5. This causes all EIO related tests to fail, which is both annoying and confusing. This patch addresses this by adding support for skipping tests if certain conditions (e.g., the presence of a SimObject) can not be met. It introduces the following Python functions that can be called from within a test case: * skip_test -- Skip a test and optionally print why the test was skipped. * has_sim_object -- Test if a SimObject exists. * require_sim_object -- Test if a SimObject exists and skip, or optionally fail, the test if not. Additionally, this patch updates the EIO tests to check for the presence of EioProcess. |
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