Searched hist:8515 (Results 1 - 1 of 1) sorted by relevance
| /gem5/src/cpu/o3/ | ||
| H A D | mem_dep_unit_impl.hh | diff 8515:12420b96b364 Fri Aug 19 16:08:00 EDT 2011 Mrinmoy Ghosh <Mrinmoy.Ghosh@arm.com> LSQ: Fix a few issues with the storeset predictor. Two issues are fixed in this patch: 1. The load and store pc passed to the predictor are passed in reverse order. 2. The flag indicating that a barrier is inflight was never cleared when the barrier was squashed instead of committed. This made all load insts dependent on a non-existent barrier in-flight. |
Completed in 12 milliseconds