Searched hist:3738 (Results 1 - 1 of 1) sorted by relevance
| /gem5/src/mem/cache/ | ||
| H A D | cache.hh | diff 3738:c06cd072bbbe Thu Dec 14 01:04:00 EST 2006 Steve Reinhardt <stever@eecs.umich.edu> Split CachePort class into CpuSidePort and MemSidePort and push those into derived Cache template class to eliminate a few layers of virtual functions and conditionals ("if (isCpuSide) { ... }" etc.). |
Completed in 29 milliseconds