Searched hist:2008 (Results 1 - 25 of 494) sorted by relevance

1234567891011>>

/gem5/src/arch/x86/isa/
H A Drom.isadiff 5676:cca6726c0d88 Sun Oct 12 23:44:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement local labels for the ROM that actually refer into the ROM.
diff 5667:78b94954f66a Sun Oct 12 20:52:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a handy way to access labels from the ROM in microcode.
5666:e7925fa8f0d6 Sun Oct 12 20:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make X86's microcode ROM actually do something.
/gem5/src/cpu/o3/
H A Ddyn_inst.cc5597:e2983d751be4 Thu Oct 09 03:10:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> O3: Generaize the O3 IMPL class so it isn't split out by ISA.
/gem5/src/arch/alpha/
H A Dmicrocode_rom.hh5664:3b3756efad89 Sun Oct 12 18:59:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
H A Dinterrupts.cc5647:b06b49498c79 Sun Oct 12 12:09:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
H A Dipr.ccdiff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
H A Dev5.hhdiff 5570:13592d41f290 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> gcc: Add extra parens to quell warnings.
Even though we're not incorrect about operator precedence, let's add
some parens in some particularly confusing places to placate GCC 4.3
so that we don't have to turn the warning off. Agreed that this is a
bit of a pain for those users who get the order of operations correct,
but it is likely to prevent bugs in certain cases.
diff 5569:baeee670d4ce Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> style: Make a style pass over the whole arch/alpha directory.
diff 5568:d14250d688d2 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Clean up namespace usage.
diff 5566:3440c9ad49b4 Sun Sep 28 00:03:00 EDT 2008 Nathan Binkert <nate@binkert.org> alpha: Get rid fo the namespace called EV5.
We're never going to do an alpha platform other than the one we've got.
/gem5/src/arch/mips/
H A Dmicrocode_rom.hh5664:3b3756efad89 Sun Oct 12 18:59:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
/gem5/src/base/
H A Dprintable.hhdiff 5315:30997e988446 Wed Jan 02 16:46:00 EST 2008 Steve Reinhardt <stever@gmail.com> Additional comments and helper functions for PrintReq.
5314:e902f12a3af1 Wed Jan 02 03:20:00 EST 2008 Steve Reinhardt <stever@gmail.com> Add functional PrintReq command for memory-system debugging.
H A Dflags.hhdiff 5764:f07df23e1fc8 Sat Dec 06 17:18:00 EST 2008 Nathan Binkert <nate@binkert.org> flags: Change naming of functions to be clearer
diff 5745:6b0f8306704b Fri Nov 14 07:55:00 EST 2008 Nathan Binkert <nate@binkert.org> Fix a bunch of bugs I introduced when I changed the flags stuff for packets.
I did some of the flags and assertions wrong. Thanks to Brad Beckmann
for pointing this out. I should have run the opt regressions instead
of the fast. I also screwed up some of the logical functions in the Flags
class.
5734:f3733e2b19d5 Mon Nov 10 14:51:00 EST 2008 Nathan Binkert <nate@binkert.org> flags: Provide an object for managing boolean flags for an object.
In many cases it might be preferable to use bitset, but this object
allows the user more easily manipulate groups of flags because the
underlying type (e.g. uint64_t) is exposed.
H A Dcast.hh5733:83cc5483a8da Mon Nov 10 14:51:00 EST 2008 Nathan Binkert <nate@binkert.org> safe_cast: add a new cast function for casts that should always succeed.
In DEBUG mode, this does a dynamic_cast and asserts that the result is
non null. Otherwise, it just does a static_cast. Again, this is only
intended for cases where the cast should always succeed and what's
desired is a debugging check to make sure.
/gem5/src/dev/x86/
H A Dsouth_bridge.hhdiff 5643:2b1611137af4 Sat Oct 11 19:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create an IO APIC device.
5637:3d2451ebad92 Sat Oct 11 05:21:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bring the South Bridge device into dev/x86 and get rid of south_bridge directory.
H A Dsouth_bridge.ccdiff 5643:2b1611137af4 Sat Oct 11 19:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create an IO APIC device.
diff 5638:dc073dc6358b Sat Oct 11 05:23:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Rename the PC device to Pc.
5637:3d2451ebad92 Sat Oct 11 05:21:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bring the South Bridge device into dev/x86 and get rid of south_bridge directory.
H A DSConscriptdiff 5643:2b1611137af4 Sat Oct 11 19:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create an IO APIC device.
diff 5642:102cf92b8ea9 Sat Oct 11 18:15:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Set up a mechanism for the I8254 timer to cause interrupts.
diff 5638:dc073dc6358b Sat Oct 11 05:23:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Rename the PC device to Pc.
diff 5637:3d2451ebad92 Sat Oct 11 05:21:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bring the South Bridge device into dev/x86 and get rid of south_bridge directory.
diff 5636:27a9526eea1f Sat Oct 11 05:16:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change I8254 and PCSpeaker devices from subdevices to SimObjects and eliminate subdevices.
diff 5633:e1605152cc54 Sat Oct 11 04:37:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create the IntDev and IntPin system.

The IntDev class is a base for anything that supports IntPins. IntPins allow
devices to generically trigger interrupts on a particular pin of an IntDev
device without having to know what the device is or what pin they're attached
to.
diff 5630:b49710ff49d3 Sat Oct 11 04:22:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the I8259 from a subdevice into a real SimObject.
diff 5629:1565c13d1483 Sat Oct 11 04:13:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the CMOS from a sub-device to a real SimObject
diff 5390:5bacb5dc3ef6 Tue Mar 25 02:08:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Start implementing the south bridge stuff.
diff 5389:215d8a8c97df Tue Mar 25 02:06:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Change the Opteron platform to be the PC platform.
/gem5/src/arch/x86/isa/insts/general_purpose/compare_and_test/
H A Dbit_scan.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5423:536fb3cc5a9b Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Redo BSF.
diff 5415:5c28e3dbdc8e Thu Jun 12 00:46:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Fix the implementation of BSF.
diff 5414:bed5152f6368 Thu Jun 12 00:45:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Bit scan forward/reverse were accidentally transposed.
diff 5333:0e394c08dcbc Wed Jan 23 08:18:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Optomize the bit scanning instruction microassembly a little. More can be done.
diff 5332:0e25e0b6982c Tue Jan 22 00:10:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement and attach the BSR and BSF instructions.
/gem5/src/arch/x86/bios/
H A DSConscriptdiff 5627:31eac202dbd1 Sat Oct 11 02:43:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the ACPI system description tables.
diff 5625:ea7d3676ac8d Sat Oct 11 02:39:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create SimObjects in python and C++ to represent the Intel MP tables.
diff 5615:1c4b9b1aa500 Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Turn SMBios structures into simobjects.
diff 5614:2e7dbd0c4a2b Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Add a couple comments to the bios SConscript
5612:1bd333953e49 Fri Oct 10 06:50:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Move the smbios objects into a folder for BIOS objects.
/gem5/src/arch/x86/isa/insts/general_purpose/string/
H A Dcompare_strings.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
H A Dload_string.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
H A Dscan_string.pydiff 5661:443e6f925027 Sun Oct 12 18:33:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Create a SeqOp class of microops and make Br one of them.
diff 5420:dc0041a51920 Thu Jun 12 00:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make string instructions work when rcx=0.
/gem5/src/arch/x86/
H A Dmicrocode_rom.hhdiff 5666:e7925fa8f0d6 Sun Oct 12 20:48:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Make X86's microcode ROM actually do something.
5664:3b3756efad89 Sun Oct 12 18:59:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
/gem5/src/dev/alpha/
H A Daccess.hdiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
/gem5/src/dev/mips/
H A Daccess.hdiff 5543:3af77710f397 Wed Sep 10 14:26:00 EDT 2008 Ali Saidi <saidi@eecs.umich.edu> style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
/gem5/src/arch/sparc/
H A Dmicrocode_rom.hh5664:3b3756efad89 Sun Oct 12 18:59:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> CPU: Create a microcode ROM object in the CPU which is defined by the ISA.
H A Dinterrupts.cc5647:b06b49498c79 Sun Oct 12 12:09:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> Turn Interrupts objects into SimObjects. Also, move local APIC state into x86's Interrupts object.
/gem5/src/arch/x86/isa/insts/general_purpose/
H A D__init__.pydiff 5659:f4b9c344d1ca Sun Oct 12 18:31:00 EDT 2008 Gabe Black <gblack@eecs.umich.edu> X86: Implement CPUID with a magical function instead of microcode.
H A Dno_operation.pydiff 5331:8d8aaad0bc36 Mon Jan 21 16:27:00 EST 2008 Gabe Black <gblack@eecs.umich.edu> X86: Fill out group17 in the decoder.

Completed in 30 milliseconds

1234567891011>>