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H A D | dram_ctrl.cc | diff 13834:1a7c647cbeac Thu Apr 04 17:10:00 EDT 2019 Jason Lowe-Power <jason@lowepower.com> mem: Reverse order of write/read mem queue check For atomic RMW instructions that go directly to memory, we want to put them on the write queue instead of the read queue. Swap the if/else condition to accomplish this. Note: This is ignoring the read latency of the RMW, but these instructions should usually be handled in caches anyway. Change-Id: I62dbfff3a16ac470f1ebdb489abe878962b20bb6 Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17828 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> |
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