Searched hist:12974 (Results 1 - 6 of 6) sorted by relevance
| /gem5/src/dev/arm/ | ||
| H A D | vio_mmio.cc | diff 12974:b840a646cfbd Thu Aug 30 11:43:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Factory SimObject for generating ArmInterruptPin With this patch the python ArmInterruptPin SimObject matches to the C++ ArmInterruptPinGen. The latter is in charge of generating the ArmInterruptPin (which is not a SimObject anymore). This is meant to ease the generation of ArmInterruptPins: by not being SimObjects we are not forced to instantiate them in the configuration script; we can generate them dynamically instead throughout simulation. Change-Id: I917d73a26168447221f5993c8ae975ee3771e3bf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12401 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | base_gic.cc | diff 12974:b840a646cfbd Thu Aug 30 11:43:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Factory SimObject for generating ArmInterruptPin With this patch the python ArmInterruptPin SimObject matches to the C++ ArmInterruptPinGen. The latter is in charge of generating the ArmInterruptPin (which is not a SimObject anymore). This is meant to ease the generation of ArmInterruptPins: by not being SimObjects we are not forced to instantiate them in the configuration script; we can generate them dynamically instead throughout simulation. Change-Id: I917d73a26168447221f5993c8ae975ee3771e3bf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12401 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | base_gic.hh | diff 12974:b840a646cfbd Thu Aug 30 11:43:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Factory SimObject for generating ArmInterruptPin With this patch the python ArmInterruptPin SimObject matches to the C++ ArmInterruptPinGen. The latter is in charge of generating the ArmInterruptPin (which is not a SimObject anymore). This is meant to ease the generation of ArmInterruptPins: by not being SimObjects we are not forced to instantiate them in the configuration script; we can generate them dynamically instead throughout simulation. Change-Id: I917d73a26168447221f5993c8ae975ee3771e3bf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12401 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| H A D | Gic.py | diff 12974:b840a646cfbd Thu Aug 30 11:43:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Factory SimObject for generating ArmInterruptPin With this patch the python ArmInterruptPin SimObject matches to the C++ ArmInterruptPinGen. The latter is in charge of generating the ArmInterruptPin (which is not a SimObject anymore). This is meant to ease the generation of ArmInterruptPins: by not being SimObjects we are not forced to instantiate them in the configuration script; we can generate them dynamically instead throughout simulation. Change-Id: I917d73a26168447221f5993c8ae975ee3771e3bf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12401 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/arch/arm/ | ||
| H A D | pmu.cc | diff 12974:b840a646cfbd Thu Aug 30 11:43:00 EDT 2018 Giacomo Travaglini <giacomo.travaglini@arm.com> dev-arm: Factory SimObject for generating ArmInterruptPin With this patch the python ArmInterruptPin SimObject matches to the C++ ArmInterruptPinGen. The latter is in charge of generating the ArmInterruptPin (which is not a SimObject anymore). This is meant to ease the generation of ArmInterruptPins: by not being SimObjects we are not forced to instantiate them in the configuration script; we can generate them dynamically instead throughout simulation. Change-Id: I917d73a26168447221f5993c8ae975ee3771e3bf Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/12401 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
| /gem5/src/systemc/core/ | ||
| H A D | sc_main.cc | diff 13255:570e2d799f70 Sat Sep 22 11:05:00 EDT 2018 Gabe Black <gabeblack@google.com> systemc: Simplify sc_time_stamp(). sc_time is now inherently based on properly scaled Ticks, so there's no reason to try to scale it to be in picoseconds, especially since the scaling factor may be unreliable if the timescale hasn't been fixed yet. Change-Id: I28baeb9792e81e1d00f6f37672df435766311864 Reviewed-on: https://gem5-review.googlesource.com/c/12974 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> |
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