Searched hist:11846 (Results 1 - 1 of 1) sorted by relevance
/gem5/src/mem/ | ||
H A D | dram_ctrl.cc | diff 11846:b9436a4bbbb9 Wed Feb 15 10:28:00 EST 2017 Wendy Elsasser <wendy.elsasser@arm.com> mem: fix assertion in respondEvent Assertion in the respondEvent erroneously fired. The assertion verifies that the controller has not moved to a low-power state prior to receiving read data from the memory. The original assertion triggered if the state was not: PWR_IDLE or PWR_ACT. In the case that failed, a periodic refresh event occurred around the read. The REF is stalled until the final read burst is issued and the subsequent PRE closes the bank. While the PRE will temporarily move the state to PWR_IDLE, state will immediately transition to PWR_REF due to the pending refresh operation. This state does not match the assertion, which is subsequently triggered. Fixed the assertion by explicitly checking that the state is not a low power state !PWR_SREF && !PWR_PRE_PDN && !PWR_ACT_PDN Change-Id: I82921a733bbeac2bcb5a487c2f981448d41ed50b Reviewed-by: Radhika Jagtap <radhika.jagtap@arm.com> |
Completed in 20 milliseconds