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/gem5/src/mem/cache/
H A Dcache.hhdiff 11452:4bc3a0c0861c Thu Apr 21 04:48:00 EDT 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Align downstream cache packet creation in atomic and timing

This patch makes the control flow more uniform in atomic and timing,
ultimately making the code easier to understand.
H A Dcache.ccdiff 11452:4bc3a0c0861c Thu Apr 21 04:48:00 EDT 2016 Andreas Hansson <andreas.hansson@arm.com> mem: Align downstream cache packet creation in atomic and timing

This patch makes the control flow more uniform in atomic and timing,
ultimately making the code easier to understand.

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