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/gem5/src/arch/x86/isa/insts/x87/control/
H A Dsave_and_restore_x87_environment.pydiff 10899:b8b8ad2c72dd Sat Jul 04 11:43:00 EDT 2015 Nikos Nikoleris <nikos.nikoleris@gmail.com> x86: Adjust the size of the values written to the x87 misc registers
All x87 misc registers are implemented in an array of 64 bit values
but in real hardware the size of some of these registers is smaller.
Previsouly all 64 bits where incorrectly set and then later read. To
ensure correctness we mask the value in setMiscRegNoEffect to write
only the valid bits.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/src/arch/x86/isa/insts/simd128/integer/save_and_restore_state/
H A Dsave_and_restore_state.pydiff 10899:b8b8ad2c72dd Sat Jul 04 11:43:00 EDT 2015 Nikos Nikoleris <nikos.nikoleris@gmail.com> x86: Adjust the size of the values written to the x87 misc registers
All x87 misc registers are implemented in an array of 64 bit values
but in real hardware the size of some of these registers is smaller.
Previsouly all 64 bits where incorrectly set and then later read. To
ensure correctness we mask the value in setMiscRegNoEffect to write
only the valid bits.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>
/gem5/src/arch/x86/
H A Disa.ccdiff 10899:b8b8ad2c72dd Sat Jul 04 11:43:00 EDT 2015 Nikos Nikoleris <nikos.nikoleris@gmail.com> x86: Adjust the size of the values written to the x87 misc registers
All x87 misc registers are implemented in an array of 64 bit values
but in real hardware the size of some of these registers is smaller.
Previsouly all 64 bits where incorrectly set and then later read. To
ensure correctness we mask the value in setMiscRegNoEffect to write
only the valid bits.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

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