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H A D | tlb.cc | diff 10825:5d059b8ed8a4 Tue May 05 03:22:00 EDT 2015 Andreas Sandberg <Andreas.Sandberg@ARM.com> arm: Relax ordering for some uncacheable accesses We currently assume that all uncacheable memory accesses are strictly ordered. Instead of always enforcing strict ordering, we now only enforce it if the required memory type is device memory or strongly ordered memory. |
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