Searched hist:10044 (Results 1 - 4 of 4) sorted by relevance
/gem5/src/arch/x86/isa/insts/x87/arithmetic/ | ||
H A D | addition.py | diff 10044:42e058cae3d0 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 add/sub instructions |
H A D | subtraction.py | diff 10044:42e058cae3d0 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 add/sub instructions |
/gem5/src/arch/x86/isa/decoder/ | ||
H A D | x87.isa | diff 10044:42e058cae3d0 Mon Jan 27 19:50:00 EST 2014 Nilay Vaish <nilay@cs.wisc.edu> x86: implements x87 add/sub instructions |
/gem5/src/arch/arm/ | ||
H A D | isa.cc | diff 12667:1b939161dcb8 Mon Jan 15 17:03:00 EST 2018 Chuan Zhu <chuan.zhu@arm.com> arch-arm: Correct masking of cp10 and cp11 in CPACR This patch fixes the masking of cp10 and cp11 in CPACR according to NSACR.cp10 / NSACR.cp11 by adding the condition "in Non-secure state, if EL3 is implemented and is using AArch32...", which is specified in ARM ARM. Change-Id: Id00e7bf04d6a985e27dbf1028677da0746b79924 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/10044 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> |
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