| /gem5/src/systemc/tests/systemc/misc/sim_tests/manual_clock/ |
| H A D | manual_clock.cpp | 53 proc1( sc_module_name NAME, sc_signal_in_if<bool>& CLK, sc_signal<bool>& A, sc_signal<bool>& B, sc_signal<bool>& C ) argument
91 proc2( sc_module_name NAME, sc_signal_in_if<bool>& CLK, sc_signal<bool>& A, sc_signal<bool>& B, sc_signal<bool>& C ) argument
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| /gem5/src/systemc/tests/systemc/misc/stars/star102574/ |
| H A D | while_fsm.h | 50 while_fsm( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<bool>& IN_VALID, const sc_signal<int>& IN_VALUE, sc_signal<bool>& OUT_VALID, sc_signal<int>& RESULT ) argument
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| /gem5/src/systemc/tests/systemc/misc/stars/star109218-2/ |
| H A D | star109218-2.cpp | 42 void my_mult(bool CLK, argument
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| /gem5/src/systemc/tests/systemc/misc/synth/blast/blast1/ |
| H A D | blast1.cpp | 54 array( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<char>& A, const sc_signal<char>& B, sc_signal<short>& C ) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/blast/blast2/ |
| H A D | blast2.cpp | 54 array( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<char>& A, const sc_signal<char>& B, sc_signal<short>& C ) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/blast/blast3/ |
| H A D | blast3.cpp | 55 array( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, sc_signal<bool>& READY, const sc_signal<char>& A, const sc_signal<char>& B, sc_signal<short>& C ) argument
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| /gem5/src/systemc/tests/systemc/misc/synth/gcd/ |
| H A D | gcd.cpp | 52 gcd_cc( sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& RESET, const sc_signal<unsigned>& A, const sc_signal<unsigned>& B, sc_signal<unsigned>& C, sc_signal<bool>& READY ) argument
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| /gem5/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc1/ |
| H A D | disaproc1.cpp | 146 sync1( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& A, sc_signal<bool>& B, const sc_signal<bool>& C, const sc_signal<bool>& D ) argument
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| /gem5/src/systemc/tests/systemc/misc/unit/aproc_halt/disaproc3/ |
| H A D | disaproc3.cpp | 152 sync1( sc_module_name NAME, sc_clock& CLK, sc_signal<bool>& A, sc_signal<bool>& B, const sc_signal<bool>& C, const sc_signal<bool>& D ) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test2/ |
| H A D | test2.cpp | 50 p1(sc_module_name name, sc_fifo<int>& A, sc_fifo<int>& B, sc_signal_in_if<bool>& CLK, int INIT) argument
88 p2(sc_module_name name, sc_clock& CLK, sc_fifo<int>& A, sc_fifo<int>& B, int INIT) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/async_chn/test3/ |
| H A D | test3.cpp | 80 p2(sc_module_name name, sc_signal_in_if<bool>& CLK, sc_fifo<int>& A, int INIT) argument
|
| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.1/ |
| H A D | mean.h | 60 mean(sc_module_name NAME, sc_clock& CLK, const signal_bool_vector& A, const signal_bool_vector& B, const signal_bool_vector& C, const signal_bool_vector& D, signal_bool_vector& AM, signal_bool_vector& GM, signal_bool_vector& HM) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.3/ |
| H A D | mean.h | 57 mean(sc_module_name NAME, sc_clock& CLK, const signal_bool_vector& IN_, signal_bool_vector& OUT_, const sc_signal<bool>& DATA_AVAILABLE, sc_signal<bool>& DATA_READY) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt11.4/ |
| H A D | mean.h | 57 mean(sc_module_name NAME, sc_clock& CLK, const sc_signal_bool_vector& IN_, sc_signal_bool_vector& OUT_, const sc_signal<bool>& RECEIVER_READY, sc_signal<bool>& SEND_INPUT) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.1/ |
| H A D | accessor.h | 56 accessor(sc_module_name NAME, sc_clock& CLK, const signal_bool_vector32& DATAIN, sc_signal<bool>& CHIP_SELECT, sc_signal<bool>& WRITE_ENABLE, signal_bool_vector10& ADDRESS, signal_bool_vector32& DATAOUT) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt12.2/ |
| H A D | accessor.h | 59 accessor(sc_module_name NAME, sc_clock& CLK, const signal_bool_vector32& DATAIN, sc_signal<bool>& CHIP_SELECT, sc_signal<bool>& WRITE_ENABLE, signal_bool_vector10& ADDRESS, signal_bool_vector32& DATAOUT, const int MEMORY_LATENCY = 1) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt14.1/ |
| H A D | proc1.h | 54 proc1(sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& DATA_ACK, sc_signal<int>& DATA, sc_signal<bool>& DATA_READY) argument
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| H A D | proc2.h | 54 proc2(sc_module_name NAME, sc_clock& CLK, const sc_signal<bool>& DATA_READY, const sc_signal<int>& DATA, sc_signal<bool>& DATA_ACK) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.1/ |
| H A D | stage1.h | 55 stage1(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& SUM, sc_signal<double>& DIFF) argument
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| H A D | stage2.h | 55 stage2(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& SUM, const sc_signal<double>& DIFF, sc_signal<double>& PROD, sc_signal<double>& QUOT) argument
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| H A D | stage3.h | 54 stage3(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& PROD, const sc_signal<double>& QUOT, sc_signal<double>& POWR) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.2/ |
| H A D | stage1.h | 55 stage1(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& SUM, sc_signal<double>& DIFF) argument
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| H A D | stage2.h | 55 stage2(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& SUM, const sc_signal<double>& DIFF, sc_signal<double>& PROD, sc_signal<double>& QUOT) argument
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| H A D | stage3.h | 54 stage3(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& PROD, const sc_signal<double>& QUOT, sc_signal<double>& POWR) argument
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| /gem5/src/systemc/tests/systemc/misc/user_guide/chpt4.4/ |
| H A D | stage1.h | 55 stage1(sc_module_name NAME, sc_clock& CLK, const sc_signal<double>& IN1, const sc_signal<double>& IN2, sc_signal<double>& SUM, sc_signal<double>& DIFF) argument
|