isa/rv64ui/slt.S

4 # slt.S
7 # Test slt instruction.
20   TEST_RR_OP( 2,  slt, 0, 0x0000000000000000, 0x0000000000000000 );
21   TEST_RR_OP( 3,  slt, 0, 0x0000000000000001, 0x0000000000000001 );
22   TEST_RR_OP( 4,  slt, 1, 0x0000000000000003, 0x0000000000000007 );
23   TEST_RR_OP( 5,  slt, 0, 0x0000000000000007, 0x0000000000000003 );
25   TEST_RR_OP( 6,  slt, 0, 0x0000000000000000, 0xffffffffffff8000 );
26   TEST_RR_OP( 7,  slt, 1, 0xffffffff80000000, 0x0000000000000000 );
27   TEST_RR_OP( 8,  slt, 1, 0xffffffff80000000, 0xffffffffffff8000 );
29   TEST_RR_OP( 9,  slt, 1, 0x0000000000000000, 0x0000000000007fff );
30   TEST_RR_OP( 10, slt, 0, 0x000000007fffffff, 0x0000000000000000 );
31   TEST_RR_OP( 11, slt, 0, 0x000000007fffffff, 0x0000000000007fff );
33   TEST_RR_OP( 12, slt, 1, 0xffffffff80000000, 0x0000000000007fff );
34   TEST_RR_OP( 13, slt, 0, 0x000000007fffffff, 0xffffffffffff8000 );
36   TEST_RR_OP( 14, slt, 0, 0x0000000000000000, 0xffffffffffffffff );
37   TEST_RR_OP( 15, slt, 1, 0xffffffffffffffff, 0x0000000000000001 );
38   TEST_RR_OP( 16, slt, 0, 0xffffffffffffffff, 0xffffffffffffffff );
44   TEST_RR_SRC1_EQ_DEST( 17, slt, 0, 14, 13 );
45   TEST_RR_SRC2_EQ_DEST( 18, slt, 1, 11, 13 );
46   TEST_RR_SRC12_EQ_DEST( 19, slt, 0, 13 );
52   TEST_RR_DEST_BYPASS( 20, 0, slt, 1, 11, 13 );
53   TEST_RR_DEST_BYPASS( 21, 1, slt, 0, 14, 13 );
54   TEST_RR_DEST_BYPASS( 22, 2, slt, 1, 12, 13 );
56   TEST_RR_SRC12_BYPASS( 23, 0, 0, slt, 0, 14, 13 );
57   TEST_RR_SRC12_BYPASS( 24, 0, 1, slt, 1, 11, 13 );
58   TEST_RR_SRC12_BYPASS( 25, 0, 2, slt, 0, 15, 13 );
59   TEST_RR_SRC12_BYPASS( 26, 1, 0, slt, 1, 10, 13 );
60   TEST_RR_SRC12_BYPASS( 27, 1, 1, slt, 0, 16, 13 );
61   TEST_RR_SRC12_BYPASS( 28, 2, 0, slt, 1,  9, 13 );
63   TEST_RR_SRC21_BYPASS( 29, 0, 0, slt, 0, 17, 13 );
64   TEST_RR_SRC21_BYPASS( 30, 0, 1, slt, 1,  8, 13 );
65   TEST_RR_SRC21_BYPASS( 31, 0, 2, slt, 0, 18, 13 );
66   TEST_RR_SRC21_BYPASS( 32, 1, 0, slt, 1,  7, 13 );
67   TEST_RR_SRC21_BYPASS( 33, 1, 1, slt, 0, 19, 13 );
68   TEST_RR_SRC21_BYPASS( 34, 2, 0, slt, 1,  6, 13 );
70   TEST_RR_ZEROSRC1( 35, slt, 0, -1 );
71   TEST_RR_ZEROSRC2( 36, slt, 1, -1 );
72   TEST_RR_ZEROSRC12( 37, slt, 0 );
73   TEST_RR_ZERODEST( 38, slt, 16, 30 );