Lines Matching refs:r8
107 // r8 ITBmiss/DTBmiss scratch
268 cmple r13, r14, r8 // R8 = 1 if intid .less than or eql. ipl
269 bne r8, sys_passive_release // Passive release is current rupt is lt or eq ipl
294 srl r12, 1, r8 // 1d, 1e: ipl 6. 1f: ipl 7.
297 cmovge r9, r8, r12 // if .ge. 1d, then take shifted value
323 // This routine can use the PALshadow registers r8, r9, and r10
331 mfpr r8, ev5__ifault_va_form // Get virtual address of PTE.
337 ld_vpte r8, 0(r8) // Get PTE, traps to DTBMISS_DOUBLE in case of TBmiss
343 and r8, osfpte_m_foe, r25 // Look for FOE set.
344 blbc r8, invalid_ipte_handler // PTE not valid.
350 mtpr r8, ev5__itb_pte // Ibox remembers the VA, load the PTE into the ITB.
366 // This routine can use the PALshadow registers r8, r9, and r10
371 mfpr r8, ev5__va_form // Get virtual address of PTE - 1 cycle delay. E0.
381 ld_vpte r8, 0(r8) // Get PTE, traps to DTBMISS_DOUBLE in case of TBmiss
387 mtpr r8, ev5__dtb_pte // Write DTB PTE part. E0.
388 blbc r8, invalid_dpte_handler // Handle invalid PTE
409 // r8 - faulting VA
426 mtpr r8, pt4 // save r8 to do exc_addr check
427 mfpr r8, exc_addr
428 blbc r8, Trap_Dtbmiss_Single //if not in palmode, should be in the single routine, dummy!
429 mfpr r8, pt4 // restore r8
434 sll r8, (64-((2*page_seg_size_bits)+page_offset_size_bits)), r22 // Clean off upper bits of VA
443 sll r8, (64-((1*page_seg_size_bits)+page_offset_size_bits)), r22 // Clean off upper bits of VA
461 mtpr r8, ev5__dtb_tag // Write the TAG. E0. No virtual references in subsequent 3 cycles.
495 mfpr r8, ev5__mm_stat // Get mmstat --ok to use r8, no tbmiss
498 srl r8, mm_stat_v_ra, r13 // Shift Ra field to ls bits
501 blbs r8, UNALIGN_NO_DISMISS // lsb only set on store or fetch_m
503 and r13, 0x1F, r8 // isolate ra
505 cmpeq r8, 0x1F, r8 // check for r31/F31
506 bne r8, dfault_fetch_ldr31_err // if its a load to r31 or f31 -- dismiss the fault
572 mfpr r8, exc_addr // get pc, preserve r14
575 blbs r8, dfault_in_pal
577 bis r8, r31, r14 // move exc_addr to correct place
905 // r8 - exception address
927 bic r8, 3, r8 // Clean PC
934 subq r9, r8, r8 // pal_base - offset
936 lda r9, pal_itb_ldq-pal_base(r8)
940 lda r9, pal_dtb_ldq-pal_base(r8)
1290 srl r8, osfpte_v_ure-osfpte_v_kre, r8 // move pte user bits to kern
1293 foe_ipte_handler_10_: srl r8, osfpte_v_kre, r25 // get kre to <0>
1349 srl r8, osfpte_v_ure-osfpte_v_kre, r8 // move pte user bits to kern
1352 invalid_ipte_handler_10_: srl r8, osfpte_v_kre, r25 // get kre to <0>
1432 srl r8, osfpte_v_ure-osfpte_v_kre, r8 // move pte user bits to kern
1438 invalid_dpte_no_dismiss_10_: srl r8, osfpte_v_kre, r12 // get kre to <0>
1504 // r8 fake PTE
1513 lda r8, osfpte_m_prot(r31) // make a fake pte with xre and xwe set
1515 cmovlbc r21, r31, r8 // set to all 0 for acv if pte<kre> is 0
1790 SAVE_GPR(r8,CNS_Q_GPR+0x40,r1)
1858 SAVE_SHADOW( r8,CNS_Q_SHADOW+0x00,r1) // also called p0...p7 in the Hudson code
1915 ldq_p r8, scStat(r14) // Unlocks scAddr.
1927 SAVE_SHADOW(r8,CNS_Q_SC_STAT,r1);
2225 RESTORE_SHADOW( r8,CNS_Q_SHADOW+0x00,r1) // also called p0...p7 in the Hudson code
2265 RESTORE_GPR(r8,CNS_Q_GPR+0x40,r1)
3784 lda r8, 1(r31) // get a 1
3785 sll r8, pmctr_v_sel0, r8 // move to sel0 position
3786 or r8, ((0xf<<pmctr_v_sel1) | (0xf<<pmctr_v_sel2)), r8 // build mux select mask
3787 and r17, r8, r25 // isolate pmctr mux select bits
3789 bic r0, r8, r0 // clear old mux select bits
3802 lda r8, 0x3F(r31) // build mux select mask
3803 sll r8, bc_ctl_v_pm_mux_sel, r8
3805 and r17, r8, r25 // isolate bc_ctl mux select bits
3806 bic r16, r8, r16 // isolate old mux select bits
3826 lda r8, 3(r31)
3827 sll r8, pmctr_v_ctl0, r8
3828 bic r14, r8, r14 // disable ctr0
3832 lda r8, 3(r31)
3833 sll r8, pmctr_v_ctl1, r8
3834 bic r14, r8, r14 // disable ctr1
3838 lda r8, 3(r31)
3839 sll r8, pmctr_v_ctl2, r8
3840 bic r14, r8, r14 // disable ctr2
3845 //orig get_pmctr_ctl r8, r25 // pmctr_ctl bit in r8. adjusted impure pointer in r25
3848 RESTORE_SHADOW(r8,CNS_Q_PM_CTL,r25);
3853 bic r8, r17, r8 // clear out old ctl bits
3854 or r14, r8, r14 // create shadow ctl bits
3874 mfpr r8, pt_pcbb // get PCB base
3880 ldq_p r16, osfpcb_q_fen(r8) // read DAT/PME/FEN quadword
3902 lda r8, 0xffff(r31)
3903 zapnot r8, 3, r8 // ctr0<15:0> mask
3904 sll r8, pmctr_v_ctr0, r8
3905 bic r14, r8, r14 // clear ctr bits
3906 bic r13, r8, r13 // clear ctr bits
3909 //orig get_addr r8, 3<<pmctr_v_ctl0, r31
3910 LDLI(r8, (3<<pmctr_v_ctl0))
3911 and r25, r8, r12 //isolate frequency select bits for ctr0
3912 bic r14, r8, r14 // clear ctl0 bits in preparation for enabling
3920 lda r8, 0xffff(r31)
3921 zapnot r8, 3, r8 // ctr1<15:0> mask
3922 sll r8, pmctr_v_ctr1, r8
3923 bic r14, r8, r14 // clear ctr bits
3924 bic r13, r8, r13 // clear ctr bits
3927 //orig get_addr r8, 3<<pmctr_v_ctl1, r31
3928 LDLI(r8, (3<<pmctr_v_ctl1))
3929 and r25, r8, r12 //isolate frequency select bits for ctr1
3930 bic r14, r8, r14 // clear ctl1 bits in preparation for enabling
3938 lda r8, 0x3FFF(r31) // ctr2<13:0> mask
3939 sll r8, pmctr_v_ctr2, r8
3940 bic r14, r8, r14 // clear ctr bits
3941 bic r13, r8, r13 // clear ctr bits
3944 //orig get_addr r8, 3<<pmctr_v_ctl2, r31
3945 LDLI(r8, (3<<pmctr_v_ctl2))
3946 and r25, r8, r12 //isolate frequency select bits for ctr2
3947 bic r14, r8, r14 // clear ctl2 bits in preparation for enabling
3956 lda r8, 0x3F(r31)
3962 sll r8, pmctr_v_ctl2, r8 // build ctl mask
3963 and r8, r14, r14 // isolate new ctl bits
3964 bic r25, r8, r25 // clear out old ctl value
3982 LDLI(r8, ((1<<pmctr_v_killu) | (1<<pmctr_v_killp) | (1<<pmctr_v_killk)))
3984 and r17, r8, r25 // isolate pmctr mode bits
3985 bic r0, r8, r0 // clear old mode bits
3991 mfpr r8, icsr
3993 bic r8, r25, r8 // clear old pma bit
3995 or r8, r25, r8
3996 mtpr r8, icsr // 4 bubbles to hw_rei
4017 lda r8, 0x3F(r31)
4018 //orig sll r8, pmctr_ctl_v_frq2, r8 // build mask for frequency select field
4021 sll r8, pmctr_ctl_v_frq2_SHIFT, r8 // build mask for frequency select field
4023 and r8, r17, r17
4024 bic r14, r8, r14 // clear out old frequency select bits
4041 lda r8, 0x3FFF(r31) // ctr2<13:0> mask
4042 sll r8, pmctr_v_ctr2, r8
4046 or r8, r9, r8 // or ctr2, ctr1, ctr0 mask
4047 bic r14, r8, r14 // clear ctr fields
4048 and r17, r8, r25 // clear all but ctr fields
4071 and r16, 63, r8
4073 bis r8, r9, r8
4074 bne r8, cache_copy_done
4076 bic r18, 63, r8
4078 beq r8, cache_copy_done
4084 subq r8, 64, r8
4085 bne r8, cache_loop
4089 ldq_u r8, 0(r17)
4097 mskqh r8, r17, r8
4099 bis r8, r9, r8
4106 stq_u r8, 0(r16)
4107 ldq_u r8, 8(r17)
4114 stq_u r8, 0(r16)
4117 mskql r8, r18, r10
4132 extql r8, r17, r8
4134 bis r8, r9, r12
4143 ldq_u r8, 0(r17)
4152 extql r8, r17, r12
4159 ldq_u r8, 7(r17)
4162 extqh r8, r17, r13
4169 mov r8, r9
4171 ldq_u r8, -1(r25)
4173 extqh r8, r17, r8
4174 bis r8, r9, r8
4176 stq_u r8, 0(r16)
4180 extql r8, r17, r8
4182 bis r8, r9, r8
4183 insqh r8, r16, r9
4184 insql r8, r16, r8
4195 and r8, r12, r8
4197 bis r8, r14, r8
4200 stq_u r8, 0(r16)