Lines Matching refs:append
343 sources.append(root)
358 self._passed.append(test)
362 self._failed.setdefault(cause, []).append(test)
399 causes.append(block)
458 missing.append('log output')
460 diffs.append(LogChecker(log_path, simout_path,
467 missing.append(name)
469 diffs.append(VcdChecker(ref_path, test_path,
472 diffs.append(Checker(ref_path, test_path, name))
543 phases.append(phase(main_args, *group[1:]))