Lines Matching refs:write
178 RequestTable::iterator write = m_writeRequestTable.begin();
180 for (; write != write_end; ++write) {
181 GPUCoalescerRequest* request = write->second;
268 // There is an outstanding write request for the cache line
273 // Check if there is any outstanding write request for the same
349 "Inserting write request for paddr %#x for type %d\n",
493 DPRINTF(GPUCoalescer, "write callback for address %#x\n", address);
517 // For Alpha, properly handle LL, SC, and write requests with respect to
977 << ", write request table: " << m_writeRequestTable
1073 // Atomics don't write to cache, so there is no MRU update...