Lines Matching refs:inport

77             m_port_requests[i][j] = false; // [outport][inport]
116 for (int inport = 0; inport < m_num_inports; inport++) {
117 int invc = m_round_robin_invc[inport];
121 if (m_input_unit[inport]->need_stage(invc, SA_,
126 int outport = m_input_unit[inport]->get_outport(invc);
127 int outvc = m_input_unit[inport]->get_outvc(invc);
132 send_allowed(inport, invc, outport, outvc);
136 m_port_requests[outport][inport] = true;
137 m_vc_winners[outport][inport]= invc;
140 m_round_robin_invc[inport] = invc + 1;
141 if (m_round_robin_invc[inport] >= m_num_vcs)
142 m_round_robin_invc[inport] = 0;
176 int inport = m_round_robin_inport[outport];
181 // inport has a request this cycle for outport
182 if (m_port_requests[outport][inport]) {
184 // grant this outport to this inport
185 int invc = m_vc_winners[outport][inport];
187 int outvc = m_input_unit[inport]->get_outvc(invc);
190 outvc = vc_allocate(outport, inport, invc);
194 flit *t_flit = m_input_unit[inport]->getTopFlit(invc);
198 "to invc %d at inport %d to flit %s at "
205 m_input_unit[inport]->get_direction()),
226 m_router->grant_switch(inport, t_flit);
233 assert(!(m_input_unit[inport]->isReady(invc,
237 m_input_unit[inport]->set_vc_idle(invc,
242 m_input_unit[inport]->increment_credit(invc, true,
247 m_input_unit[inport]->increment_credit(invc, false,
252 m_port_requests[outport][inport] = false;
255 m_round_robin_inport[outport] = inport + 1;
262 inport++;
263 if (inport >= m_num_inports)
264 inport = 0;
284 SwitchAllocator::send_allowed(int inport, int invc, int outport, int outvc)
320 Cycles t_enqueue_time = m_input_unit[inport]->get_enqueue_time(invc);
327 if (m_input_unit[inport]->need_stage(temp_vc, SA_,
329 (m_input_unit[inport]->get_outport(temp_vc) == outport) &&
330 (m_input_unit[inport]->get_enqueue_time(temp_vc) <
342 SwitchAllocator::vc_allocate(int outport, int inport, int invc)
349 m_input_unit[inport]->grant_outvc(invc, outvc);