Lines Matching refs:packet

272     // do the actual memory access and turn the packet into a response
403 // create the corresponding DRAM packet with the entry time and
423 // address of first DRAM packet is kept unaliged. Subsequent DRAM packets
446 // packet we are looking at
464 // If not found in the write q, make a DRAM packet and
487 // log packet
552 // log packet
596 for (const auto& packet : queue) {
597 DPRINTF(DRAM, "Read %lu\n", packet->addr);
602 for (const auto& packet : respQueue) {
603 DPRINTF(DRAM, "Response %lu\n", packet->addr);
608 for (const auto& packet : queue) {
609 DPRINTF(DRAM, "Write %lu\n", packet->addr);
637 // translates to only one dram packet. Otherwise, a pkt translates to
643 // run the QoS scheduler and assign a QoS priority value to the packet
688 // At this point the packet has been handled and there is a possibility
689 // to switch to low-power mode if no other packet is available
705 // track if this is the last packet before idling
729 // it is a split packet
733 // we have now serviced all children packets of a system packet
742 // it is not a split packet
789 // check if there is a packet going to a free rank
828 // if we have no row hit, prepped or not, and no seamless packet,
843 DPRINTF(DRAM, "%s checking packet in bank %d\n",
847 // jump to the next packet
869 // if we did not find a packet to a closed row that can
871 // did not yet find a packet to a prepped row, remember
922 // do the actual memory access which also turns the packet into a
926 // turn packet around to go back to requester if response expected
928 // access already turned the packet into a response
936 // Here we reset the timing of the packet before sending it out.
939 // queue the packet in the response queue to be sent out after
943 // @todo the packet is going to be deleted, and the DRAMPacket
1153 // update the packet ready time
1242 // 3) make sure we are not considering the packet that we are