mem/cache/base.hh

408     inline bool allocOnFill(MemCmd cmd) const
411             cmd == MemCmd::WriteLineReq ||
412             cmd == MemCmd::ReadReq ||
413             cmd == MemCmd::WriteReq ||
923     Stats::Vector hits[MemCmd::NUM_MEM_CMDS];
931     Stats::Vector misses[MemCmd::NUM_MEM_CMDS];
941     Stats::Vector missLatency[MemCmd::NUM_MEM_CMDS];
948     Stats::Formula accesses[MemCmd::NUM_MEM_CMDS];
955     Stats::Formula missRate[MemCmd::NUM_MEM_CMDS];
962     Stats::Formula avgMissLatency[MemCmd::NUM_MEM_CMDS];
983     Stats::Vector mshr_hits[MemCmd::NUM_MEM_CMDS];
990     Stats::Vector mshr_misses[MemCmd::NUM_MEM_CMDS];
997     Stats::Vector mshr_uncacheable[MemCmd::NUM_MEM_CMDS];
1002     Stats::Vector mshr_miss_latency[MemCmd::NUM_MEM_CMDS];
1009     Stats::Vector mshr_uncacheable_lat[MemCmd::NUM_MEM_CMDS];
1014     Stats::Formula mshrMissRate[MemCmd::NUM_MEM_CMDS];
1021     Stats::Formula avgMshrMissLatency[MemCmd::NUM_MEM_CMDS];
1028     Stats::Formula avgMshrUncacheableLatency[MemCmd::NUM_MEM_CMDS];
1092         assert(pkt->isWrite() || pkt->cmd == MemCmd::CleanEvict);