Lines Matching refs:simdId

55     simdId = p->simdId;
299 return physicalVgprIndex % computeUnit->vrf[simdId]->numRegs();
360 computeUnit->cu_id, simdId, wfSlotId, ii->disassemble());
364 if (!computeUnit->wfWait[simdId].prerdy()) {
377 if (!computeUnit->wfWait[simdId].prerdy()) {
385 if (!computeUnit->wfWait[simdId].prerdy()) {
401 if (!computeUnit->wfWait[simdId].prerdy()) {
405 if (!computeUnit->vrf[simdId]->vrfOperandAccessReady(this, ii,
410 if (!computeUnit->vrf[simdId]->operandsReady(this, ii)) {
445 if (!computeUnit->vrf[simdId]->vrfOperandAccessReady(this, ii,
449 if (!computeUnit->vrf[simdId]->operandsReady(this, ii)) {
482 if (!computeUnit->vrf[simdId]->vrfOperandAccessReady(this, ii,
486 if (!computeUnit->vrf[simdId]->operandsReady(this, ii)) {
521 if (!computeUnit->vrf[simdId]->vrfOperandAccessReady(this, ii,
526 if (!computeUnit->vrf[simdId]->operandsReady(this, ii)) {
537 simdId, wfSlotId, ii->disassemble());
547 computeUnit->vrf[simdId]->updateResources(this, ii);
556 computeUnit->aluPipe[simdId].preset(computeUnit->shader->
559 computeUnit->wfWait[simdId].preset(computeUnit->shader->
562 computeUnit->wfWait[simdId].preset(computeUnit->shader->
657 "(pc: %i)\n", computeUnit->cu_id, simdId, wfSlotId, wfDynId,
665 computeUnit->vrf[simdId]->exec(ii, this);
670 computeUnit->lastExecCycle[simdId]);
671 computeUnit->lastExecCycle[simdId] = computeUnit->totalCycles.value();
707 computeUnit->aluPipe[simdId].set(computeUnit->shader->
711 computeUnit->wfWait[simdId].set(computeUnit->shader->
714 computeUnit->wfWait[simdId].set(computeUnit->shader->
796 computeUnit->cu_id, simdId, wfSlotId, wfDynId,
893 uint32_t regVal = computeUnit->vrf[simdId]->
902 uint64_t regVal = computeUnit->vrf[simdId]->
955 computeUnit->vrf[simdId]->write<uint32_t>(vgprIdx, regVal, lane);
963 computeUnit->vrf[simdId]->write<uint64_t>(vgprIdx, regVal, lane);