src/gpu-compute/compute_unit.cc

306             "WF[%d][%d]\n", _n_wave, barrier_id, cu_id, w->simdId, w->wfSlotId);
486 ComputeUnit::cedeSIMD(int simdId, int wfSlotId)
507                     if (cur_wave.simdId == simdId &&
514                         if (owner_wave.simdId != cur_wave.simdId ||
633             computeUnit->wfList[gpuDynInst->simdId][gpuDynInst->wfSlotId];
638                     computeUnit->cu_id, w->simdId, w->wfSlotId,
648                 computeUnit->cu_id, gpuDynInst->simdId,
676             computeUnit->cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
695                 computeUnit->cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
730                 computeUnit->cu_id, wavefront->simdId, wavefront->wfSlotId,
782                       cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId, vaddr);
790                           cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
852                     "scheduled\n", cu_id, gpuDynInst->simdId,
860                     "failed!\n", cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
872                     "failed!\n", cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
879                    cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId, tmp_vaddr);
908                 gpuDynInst->simdId, gpuDynInst->wfSlotId, index,
934             cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId, index,
987             compute_unit->cu_id, gpuDynInst->simdId, gpuDynInst->wfSlotId,
1033                         compute_unit->cu_id, gpuDynInst->simdId,
1089             computeUnit->wfList[sender_state->_gpuDynInst->simdId]
1133         int simdId = gpuDynInst->simdId;
1142             last = computeUnit->lastVaddrSimd[simdId][mp_index];
1145             last = computeUnit->lastVaddrWF[simdId][wfSlotId][mp_index];
1151                 computeUnit->cu_id, simdId, wfSlotId, mp_index, last);
1160         computeUnit->lastVaddrSimd[simdId][mp_index] = vaddr;
1161         computeUnit->lastVaddrWF[simdId][wfSlotId][mp_index] = vaddr;
1167                 computeUnit->cu_id, simdId, wfSlotId, mp_index);
1228             computeUnit->cu_id, gpuDynInst->simdId,
1265                 compute_unit->cu_id, gpuDynInst->simdId,
1271                 compute_unit->cu_id, gpuDynInst->simdId,
1766 ComputeUnit::isSimdDone(uint32_t simdId) const
1768     assert(simdId < numSIMDs);
1778     if (!aluPipe[simdId].rdy()) {
1783         if (wfList[simdId][i_wf]->status != Wavefront::S_STOPPED) {
1853                         computeUnit->cu_id, gpuDynInst->simdId,
1863                 computeUnit->cu_id, gpuDynInst->simdId,
1868                 computeUnit->cu_id, gpuDynInst->simdId,