dev/net/ns_gige.cc

221             reg = regs.command;
227             reg = regs.config;
231             reg = regs.mear;
235             reg = regs.ptscr;
239             reg = regs.isr;
244             reg = regs.imr;
248             reg = regs.ier;
252             reg = regs.ihr;
256             reg = regs.txdp;
260             reg = regs.txdp_hi;
264             reg = regs.txcfg;
268             reg = regs.gpior;
272             reg = regs.rxdp;
276             reg = regs.rxdp_hi;
280             reg = regs.rxcfg;
284             reg = regs.pqcr;
288             reg = regs.wcsr;
292             reg = regs.pcr;
301             reg = regs.rfcr;
305             rfaddr = (uint16_t)(regs.rfcr & RFCR_RFADDR);
341             reg = regs.srr;
345             reg = regs.mibc;
350             reg = regs.vrcr;
354             reg = regs.vtcr;
358             reg = regs.vdr;
362             reg = regs.ccsr;
366             reg = regs.tbicr;
370             reg = regs.tbisr;
374             reg = regs.tanar;
378             reg = regs.tanlpar;
382             reg = regs.taner;
386             reg = regs.tesr;
434             regs.command = reg;
479                 regs.config &= CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
483                 regs.config |= reg & ~(CFGR_LNKSTS | CFGR_SPDSTS | CFGR_DUPSTS |
502             regs.mear &= MEAR_EEDO;
504             regs.mear |= reg & ~MEAR_EEDO;
515                 regs.mear &= ~MEAR_EEDI;
524             regs.ptscr = reg & ~(PTSCR_RBIST_RDONLY);
528                 regs.ptscr |= PTSCR_RBIST_DONE;
530                 regs.ptscr &= ~PTSCR_EEBIST_EN;
532                 regs.ptscr &= ~PTSCR_EELOAD_EN;
539             regs.imr = reg;
544             regs.ier = reg;
548             regs.ihr = reg;
553             regs.txdp = (reg & 0xFFFFFFFC);
559             regs.txdp_hi = reg;
563             regs.txcfg = reg;
574             regs.gpior &= GPIOR_UNUSED | GPIOR_GP5_IN | GPIOR_GP4_IN
576             regs.gpior |= reg & ~(GPIOR_UNUSED | GPIOR_GP5_IN | GPIOR_GP4_IN
582             regs.rxdp = reg;
587             regs.rxdp_hi = reg;
591             regs.rxcfg = reg;
596             regs.pqcr = reg;
601             regs.wcsr = reg;
606             regs.pcr = reg;
610             regs.rfcr = reg;
629             rfaddr = (uint16_t)(regs.rfcr & RFCR_RFADDR);
663             regs.brar = reg;
676             regs.vrcr = reg;
680             regs.vtcr = reg;
688             regs.ccsr = reg;
692             regs.tbicr = reg;
697                 regs.tanlpar = regs.tanar;
698                 regs.tbisr |= (TBISR_MR_AN_COMPLETE | TBISR_MR_LINK_STATUS);
708             regs.tanar &= TANAR_RF1 | TANAR_RF2 | TANAR_UNUSED;
709             regs.tanar |= reg & ~(TANAR_RF1 | TANAR_RF2 | TANAR_UNUSED);
721             regs.tesr = reg;
744     regs.isr |= interrupts;
746     if (interrupts & regs.imr) {
775             interrupts, regs.isr, regs.imr);
777     if ((regs.isr & regs.imr)) {
779         if ((regs.isr & regs.imr & ISR_NODELAY) == 0)
797     if (regs.isr & regs.imr & ISR_SWI) {
800     if (regs.isr & regs.imr & ISR_RXIDLE) {
803     if (regs.isr & regs.imr & ISR_RXOK) {
806     if (regs.isr & regs.imr & ISR_RXDESC) {
809     if (regs.isr & regs.imr & ISR_TXOK) {
812     if (regs.isr & regs.imr & ISR_TXIDLE) {
815     if (regs.isr & regs.imr & ISR_TXDESC) {
818     if (regs.isr & regs.imr & ISR_RXORN) {
823     regs.isr &= ~interrupts;
827             interrupts, regs.isr, regs.imr);
829     if (!(regs.isr & regs.imr))
837             regs.isr, regs.imr, regs.isr & regs.imr);
839     if (regs.isr & regs.imr)
960     memset(&regs, 0, sizeof(regs));
961     regs.config = (CFGR_LNKSTS | CFGR_TBI_EN | CFGR_MODE_1000);
962     regs.mear = 0x12;
963     regs.txcfg = 0x120; // set drain threshold to 1024 bytes and
965     regs.rxcfg = 0x4;   // set drain threshold to 16 bytes
966     regs.srr = 0x0103;  // set the silicon revision to rev B or 0x103
967     regs.mibc = MIBC_FRZ;
968     regs.vdr = 0x81;    // set the vlan tag type to 802.1q
969     regs.tesr = 0xc000; // TBI capable of both full and half duplex
970     regs.brar = 0xffffffff;
1044     bool is64bit = (bool)(regs.config & CFGR_M64ADDR);
1098             rxDmaAddr = regs.rxdp & 0x3fffffff;
1112             rxDmaAddr = regs.rxdp & 0x3fffffff;
1137                 regs.rxdp & 0x3fffffff);
1259                     regs.rxdp & 0x3fffffff);
1264             rxDmaAddr = regs.rxdp & 0x3fffffff;
1324             regs.rxdp = link;
1327             rxDmaAddr = regs.rxdp & 0x3fffffff;
1471     bool is64bit = (bool)(regs.config & CFGR_M64ADDR);
1515             txDmaAddr = regs.txdp & 0x3fffffff;
1530             txDmaAddr = regs.txdp & 0x3fffffff;
1555                 regs.txdp & 0x3fffffff);
1586                 txDmaAddr = regs.txdp & 0x3fffffff;
1603                 if ((regs.vtcr & VTCR_PPCHK) && extstsEnable) {
1670                 txDmaAddr = regs.txdp & 0x3fffffff;
1764             regs.txdp = link;
1808         if (regs.mear & MEAR_EEDI) {
1818         eepromOpcode += (regs.mear & MEAR_EEDI) ? 1 : 0;
1835         eepromAddress += (regs.mear & MEAR_EEDI) ? 1 : 0;
1872             regs.mear &= ~MEAR_EEDI;
1878         regs.mear &= ~MEAR_EEDO;
1880         regs.mear |= (eepromData & 0x8000) ? MEAR_EEDO : 0x0;
2033     SERIALIZE_SCALAR(regs.command);
2034     SERIALIZE_SCALAR(regs.config);
2035     SERIALIZE_SCALAR(regs.mear);
2036     SERIALIZE_SCALAR(regs.ptscr);
2037     SERIALIZE_SCALAR(regs.isr);
2038     SERIALIZE_SCALAR(regs.imr);
2039     SERIALIZE_SCALAR(regs.ier);
2040     SERIALIZE_SCALAR(regs.ihr);
2041     SERIALIZE_SCALAR(regs.txdp);
2042     SERIALIZE_SCALAR(regs.txdp_hi);
2043     SERIALIZE_SCALAR(regs.txcfg);
2044     SERIALIZE_SCALAR(regs.gpior);
2045     SERIALIZE_SCALAR(regs.rxdp);
2046     SERIALIZE_SCALAR(regs.rxdp_hi);
2047     SERIALIZE_SCALAR(regs.rxcfg);
2048     SERIALIZE_SCALAR(regs.pqcr);
2049     SERIALIZE_SCALAR(regs.wcsr);
2050     SERIALIZE_SCALAR(regs.pcr);
2051     SERIALIZE_SCALAR(regs.rfcr);
2052     SERIALIZE_SCALAR(regs.rfdr);
2053     SERIALIZE_SCALAR(regs.brar);
2054     SERIALIZE_SCALAR(regs.brdr);
2055     SERIALIZE_SCALAR(regs.srr);
2056     SERIALIZE_SCALAR(regs.mibc);
2057     SERIALIZE_SCALAR(regs.vrcr);
2058     SERIALIZE_SCALAR(regs.vtcr);
2059     SERIALIZE_SCALAR(regs.vdr);
2060     SERIALIZE_SCALAR(regs.ccsr);
2061     SERIALIZE_SCALAR(regs.tbicr);
2062     SERIALIZE_SCALAR(regs.tbisr);
2063     SERIALIZE_SCALAR(regs.tanar);
2064     SERIALIZE_SCALAR(regs.tanlpar);
2065     SERIALIZE_SCALAR(regs.taner);
2066     SERIALIZE_SCALAR(regs.tesr);
2198     UNSERIALIZE_SCALAR(regs.command);
2199     UNSERIALIZE_SCALAR(regs.config);
2200     UNSERIALIZE_SCALAR(regs.mear);
2201     UNSERIALIZE_SCALAR(regs.ptscr);
2202     UNSERIALIZE_SCALAR(regs.isr);
2203     UNSERIALIZE_SCALAR(regs.imr);
2204     UNSERIALIZE_SCALAR(regs.ier);
2205     UNSERIALIZE_SCALAR(regs.ihr);
2206     UNSERIALIZE_SCALAR(regs.txdp);
2207     UNSERIALIZE_SCALAR(regs.txdp_hi);
2208     UNSERIALIZE_SCALAR(regs.txcfg);
2209     UNSERIALIZE_SCALAR(regs.gpior);
2210     UNSERIALIZE_SCALAR(regs.rxdp);
2211     UNSERIALIZE_SCALAR(regs.rxdp_hi);
2212     UNSERIALIZE_SCALAR(regs.rxcfg);
2213     UNSERIALIZE_SCALAR(regs.pqcr);
2214     UNSERIALIZE_SCALAR(regs.wcsr);
2215     UNSERIALIZE_SCALAR(regs.pcr);
2216     UNSERIALIZE_SCALAR(regs.rfcr);
2217     UNSERIALIZE_SCALAR(regs.rfdr);
2218     UNSERIALIZE_SCALAR(regs.brar);
2219     UNSERIALIZE_SCALAR(regs.brdr);
2220     UNSERIALIZE_SCALAR(regs.srr);
2221     UNSERIALIZE_SCALAR(regs.mibc);
2222     UNSERIALIZE_SCALAR(regs.vrcr);
2223     UNSERIALIZE_SCALAR(regs.vtcr);
2224     UNSERIALIZE_SCALAR(regs.vdr);
2225     UNSERIALIZE_SCALAR(regs.ccsr);
2226     UNSERIALIZE_SCALAR(regs.tbicr);
2227     UNSERIALIZE_SCALAR(regs.tbisr);
2228     UNSERIALIZE_SCALAR(regs.tanar);
2229     UNSERIALIZE_SCALAR(regs.tanlpar);
2230     UNSERIALIZE_SCALAR(regs.taner);
2231     UNSERIALIZE_SCALAR(regs.tesr);