Lines Matching refs:yield
135 SMMUTranslationProcess::main(Yield &yield)
143 yield(a);
155 doSemaphoreDown(yield, ifc.slavePortSem);
156 doDelay(yield, Cycles(numSlaveBeats));
164 doDelay(yield, Cycles(1));
165 completeTransaction(yield, bypass(request.addr));
176 if (hazard4kCheck() || ifcTLBLookup(yield, tr, wasPrefetched))
177 completePrefetch(yield); // this never returns
181 tr = smmuTranslation(yield);
184 ifcTLBUpdate(yield, tr);
188 completePrefetch(yield);
192 if (!microTLBLookup(yield, tr)) {
193 bool hit = ifcTLBLookup(yield, tr, wasPrefetched);
196 hazard4kHold(yield);
197 hit = ifcTLBLookup(yield, tr, wasPrefetched);
210 tr = smmuTranslation(yield);
213 ifcTLBUpdate(yield, tr);
222 microTLBUpdate(yield, tr);
225 hazardIdHold(yield);
231 completeTransaction(yield, tr);
248 SMMUTranslationProcess::smmuTranslation(Yield &yield)
253 doSemaphoreDown(yield, smmu.transSem);
256 doSemaphoreDown(yield, smmu.ifcSmmuSem);
257 doDelay(yield, Cycles(1)); // serialize transactions
259 doDelay(yield, smmu.ifcSmmuLat - Cycles(1)); // remaining pipeline delay
262 if (!configCacheLookup(yield, context)) {
263 if(findConfig(yield, context, tr)) {
264 configCacheUpdate(yield, context);
270 if (haveConfig && !smmuTLBLookup(yield, tr)) {
274 doSemaphoreDown(yield, smmu.ptwSem);
280 tr = translateStage1And2(yield, request.addr);
282 tr = translateStage2(yield, request.addr, true);
294 smmuTLBUpdate(yield, tr);
298 doSemaphoreDown(yield, smmu.smmuIfcSem);
299 doDelay(yield, Cycles(1)); // serialize transactions
301 doDelay(yield, smmu.smmuIfcLat - Cycles(1)); // remaining pipeline delay
310 SMMUTranslationProcess::microTLBLookup(Yield &yield, TranslResult &tr)
315 doSemaphoreDown(yield, ifc.microTLBSem);
316 doDelay(yield, ifc.microTLBLat);
341 SMMUTranslationProcess::ifcTLBLookup(Yield &yield, TranslResult &tr,
347 doSemaphoreDown(yield, ifc.mainTLBSem);
348 doDelay(yield, ifc.mainTLBLat);
376 SMMUTranslationProcess::smmuTLBLookup(Yield &yield, TranslResult &tr)
381 doSemaphoreDown(yield, smmu.tlbSem);
382 doDelay(yield, smmu.tlbLat);
407 SMMUTranslationProcess::microTLBUpdate(Yield &yield,
427 doSemaphoreDown(yield, ifc.microTLBSem);
439 SMMUTranslationProcess::ifcTLBUpdate(Yield &yield,
464 doSemaphoreDown(yield, ifc.mainTLBSem);
476 SMMUTranslationProcess::smmuTLBUpdate(Yield &yield,
493 doSemaphoreDown(yield, smmu.tlbSem);
505 SMMUTranslationProcess::configCacheLookup(Yield &yield, TranslContext &tc)
510 doSemaphoreDown(yield, smmu.configSem);
511 doDelay(yield, smmu.configLat);
545 SMMUTranslationProcess::configCacheUpdate(Yield &yield,
567 doSemaphoreDown(yield, smmu.configSem);
577 SMMUTranslationProcess::findConfig(Yield &yield,
585 doReadSTE(yield, ste, request.sid);
628 doReadCD(yield, cd, ste, request.sid, request.ssid);
648 Yield &yield,
667 doSemaphoreDown(yield, smmu.walkSem);
668 doDelay(yield, smmu.walkLat);
688 SMMUTranslationProcess::walkCacheUpdate(Yield &yield, Addr va,
709 doSemaphoreDown(yield, smmu.walkSem);
729 SMMUTranslationProcess::walkStage1And2(Yield &yield, Addr addr,
735 doSemaphoreDown(yield, smmu.cycleSem);
736 doDelay(yield, Cycles(1));
745 doReadPTE(yield, addr, pte_addr, &pte, 1, level);
750 doSemaphoreDown(yield, smmu.cycleSem);
751 doDelay(yield, Cycles(1));
781 TranslResult s2tr = translateStage2(yield, walkPtr, false);
788 walkCacheUpdate(yield, addr, pt_ops->walkMask(level), walkPtr,
799 TranslResult s2tr = translateStage2(yield, tr.addr, true);
806 walkCacheUpdate(yield, addr, tr.addrMask, tr.addr,
813 SMMUTranslationProcess::walkStage2(Yield &yield, Addr addr, bool final_tr,
819 doSemaphoreDown(yield, smmu.cycleSem);
820 doDelay(yield, Cycles(1));
829 doReadPTE(yield, addr, pte_addr, &pte, 2, level);
834 doSemaphoreDown(yield, smmu.cycleSem);
835 doDelay(yield, Cycles(1));
862 walkCacheUpdate(yield, addr, pt_ops->walkMask(level), walkPtr,
879 SMMUTranslationProcess::translateStage1And2(Yield &yield, Addr addr)
893 walkCacheLookup(yield, walk_ep, addr,
911 tr = walkStage1And2(yield, addr, pt_ops, level+1, walk_ep->pa);
916 TranslResult s2tr = translateStage2(yield, table_addr, false);
923 tr = walkStage1And2(yield, addr, pt_ops,
935 SMMUTranslationProcess::translateStage2(Yield &yield, Addr addr, bool final_tr)
942 doSemaphoreDown(yield, smmu.ipaSem);
943 doDelay(yield, smmu.ipaLat);
974 walkCacheLookup(yield, walk_ep, addr,
993 tr = walkStage2(yield, addr, final_tr, pt_ops,
997 tr = walkStage2(yield, addr, final_tr, pt_ops,
1015 doSemaphoreDown(yield, smmu.ipaSem);
1068 SMMUTranslationProcess::hazard4kHold(Yield &yield)
1091 doWaitForSignal(yield, ifc.duplicateReqRemoved);
1141 SMMUTranslationProcess::hazardIdHold(Yield &yield)
1165 doWaitForSignal(yield, ifc.dependentReqRemoved);
1223 SMMUTranslationProcess::completeTransaction(Yield &yield,
1233 doSemaphoreDown(yield, smmu.masterPortSem);
1234 doDelay(yield, Cycles(numMasterBeats));
1270 yield(a);
1273 PacketPtr pkt = yield.get();
1280 yield(a);
1285 SMMUTranslationProcess::completePrefetch(Yield &yield)
1294 yield(a);
1298 SMMUTranslationProcess::sendEvent(Yield &yield, const SMMUEvent &ev)
1318 doWrite(yield, event_addr, &ev, sizeof(ev));
1323 doWrite(yield, smmu.regs.eventq_irq_cfg0 & E_BASE_ADDR_MASK,
1328 SMMUTranslationProcess::doReadSTE(Yield &yield,
1352 doReadConfig(yield, l2_addr, &l2_ptr, sizeof(l2_ptr), sid, 0);
1377 doReadConfig(yield, ste_addr, &ste, sizeof(ste), sid, 0);
1395 SMMUTranslationProcess::doReadCD(Yield &yield,
1419 l2_addr = translateStage2(yield, l2_addr, false).addr;
1423 doReadConfig(yield, l2_addr, &l2_ptr, sizeof(l2_ptr), sid, ssid);
1436 cd_addr = translateStage2(yield, cd_addr, false).addr;
1440 doReadConfig(yield, cd_addr, &cd, sizeof(cd), sid, ssid);
1459 SMMUTranslationProcess::doReadConfig(Yield &yield, Addr addr,
1463 doRead(yield, addr, ptr, size);
1467 SMMUTranslationProcess::doReadPTE(Yield &yield, Addr va, Addr addr,
1476 doRead(yield, base, ptr, pte_size);