dev/arm/smmu_v3.cc

56 SMMUv3::SMMUv3(SMMUv3Params *params) :
57     ClockedObject(params),
58     system(*params->system),
59     masterId(params->system->getMasterId(this)),
62     controlPort(name() + ".control", *this, params->reg_map),
63     tlb(params->tlb_entries, params->tlb_assoc, params->tlb_policy),
64     configCache(params->cfg_entries, params->cfg_assoc, params->cfg_policy),
65     ipaCache(params->ipa_entries, params->ipa_assoc, params->ipa_policy),
66     walkCache({ { params->walk_S1L0, params->walk_S1L1,
67                   params->walk_S1L2, params->walk_S1L3,
68                   params->walk_S2L0, params->walk_S2L1,
69                   params->walk_S2L2, params->walk_S2L3 } },
70               params->walk_assoc, params->walk_policy),
71     tlbEnable(params->tlb_enable),
72     configCacheEnable(params->cfg_enable),
73     ipaCacheEnable(params->ipa_enable),
74     walkCacheEnable(params->walk_enable),
76     walkCacheNonfinalEnable(params->wc_nonfinal_enable),
77     walkCacheS1Levels(params->wc_s1_levels),
78     walkCacheS2Levels(params->wc_s2_levels),
79     masterPortWidth(params->master_port_width),
80     tlbSem(params->tlb_slots),
83     configSem(params->cfg_slots),
84     ipaSem(params->ipa_slots),
85     walkSem(params->walk_slots),
87     transSem(params->xlate_slots),
88     ptwSem(params->ptw_slots),
90     tlbLat(params->tlb_lat),
91     ifcSmmuLat(params->ifc_smmu_lat),
92     smmuIfcLat(params->smmu_ifc_lat),
93     configLat(params->cfg_lat),
94     ipaLat(params->ipa_lat),
95     walkLat(params->walk_lat),
96     slaveInterfaces(params->slave_interfaces),
98     regsMap(params->reg_map),
109     regs.idr0 = params->smmu_idr0;
110     regs.idr1 = params->smmu_idr1;
111     regs.idr2 = params->smmu_idr2;
112     regs.idr3 = params->smmu_idr3;
113     regs.idr4 = params->smmu_idr4;
114     regs.idr5 = params->smmu_idr5;
115     regs.iidr = params->smmu_iidr;
116     regs.aidr = params->smmu_aidr;