dev/arm/gic_v3_cpu_interface.cc

51 const uint8_t Gicv3CPUInterface::GIC_MIN_BPR;
52 const uint8_t Gicv3CPUInterface::GIC_MIN_BPR_NS;
54 Gicv3CPUInterface::Gicv3CPUInterface(Gicv3 * gic, uint32_t cpu_id)
66 Gicv3CPUInterface::init()
73 Gicv3CPUInterface::resetHppi(uint32_t intid)
80 Gicv3CPUInterface::setThreadContext(ThreadContext *tc)
86 Gicv3CPUInterface::getHCREL2FMO() const
100 Gicv3CPUInterface::getHCREL2IMO() const
114 Gicv3CPUInterface::readMiscReg(int misc_reg)
724         panic("Gicv3CPUInterface::readMiscReg(): unknown register %d (%s)",
728     DPRINTF(GIC, "Gicv3CPUInterface::readMiscReg(): register %s value %#x\n",
734 Gicv3CPUInterface::setMiscReg(int misc_reg, RegVal val)
737     DPRINTF(GIC, "Gicv3CPUInterface::setMiscReg(): register %s value %#x\n",
1605         panic("Gicv3CPUInterface::setMiscReg(): unknown register %d (%s)",
1617 Gicv3CPUInterface::readBankedMiscReg(MiscRegIndex misc_reg) const
1624 Gicv3CPUInterface::setBankedMiscReg(MiscRegIndex misc_reg, RegVal val) const
1631 Gicv3CPUInterface::virtualFindActive(uint32_t int_id) const
1648 Gicv3CPUInterface::getHPPIR0() const
1674 Gicv3CPUInterface::getHPPIR1() const
1709 Gicv3CPUInterface::dropPriority(Gicv3::GroupId group)
1738 Gicv3CPUInterface::virtualDropPriority()
1768 Gicv3CPUInterface::generateSGI(RegVal val, Gicv3::GroupId group)
1812 Gicv3CPUInterface::activateIRQ(uint32_t int_id, Gicv3::GroupId group)
1858 Gicv3CPUInterface::virtualActivateIRQ(uint32_t lr_idx)
1879 Gicv3CPUInterface::deactivateIRQ(uint32_t int_id, Gicv3::GroupId group)
1893 Gicv3CPUInterface::virtualDeactivateIRQ(int lr_idx)
1918 Gicv3CPUInterface::groupPriorityMask(Gicv3::GroupId group)
1949 Gicv3CPUInterface::virtualGroupPriorityMask(Gicv3::GroupId group) const
1975 Gicv3CPUInterface::isEOISplitMode() const
1992 Gicv3CPUInterface::virtualIsEOISplitMode() const
1999 Gicv3CPUInterface::highestActiveGroup() const
2021 Gicv3CPUInterface::updateDistributor()
2027 Gicv3CPUInterface::update()
2042         DPRINTF(GIC, "Gicv3CPUInterface::update(): "
2061 Gicv3CPUInterface::virtualUpdate()
2089         DPRINTF(GIC, "Gicv3CPUInterface::virtualUpdate(): "
2097         DPRINTF(GIC, "Gicv3CPUInterface::virtualUpdate(): "
2107 Gicv3CPUInterface::getHPPVILR() const
2151 Gicv3CPUInterface::hppviCanPreempt(int lr_idx) const
2187 Gicv3CPUInterface::virtualHighestActivePriority() const
2208 Gicv3CPUInterface::virtualIncrementEOICount()
2220 Gicv3CPUInterface::intSignalType(Gicv3::GroupId group) const
2239         panic("Gicv3CPUInterface::intSignalType(): invalid group!");
2250 Gicv3CPUInterface::hppiCanPreempt()
2283 Gicv3CPUInterface::highestActivePriority() const
2298 Gicv3CPUInterface::groupEnabled(Gicv3::GroupId group) const
2320         panic("Gicv3CPUInterface::groupEnable(): invalid group!\n");
2325 Gicv3CPUInterface::inSecureState() const
2337 Gicv3CPUInterface::currEL() const
2362 Gicv3CPUInterface::haveEL(ExceptionLevel el) const
2382 Gicv3CPUInterface::isSecureBelowEL3() const
2389 Gicv3CPUInterface::isAA64() const
2396 Gicv3CPUInterface::isEL3OrMon() const
2414 Gicv3CPUInterface::eoiMaintenanceInterruptStatus() const
2446 Gicv3CPUInterface::ICH_MISR_EL2
2447 Gicv3CPUInterface::maintenanceInterruptStatus() const
2535 Gicv3CPUInterface::bpr1(Gicv3::GroupId group)
2576 Gicv3CPUInterface::serialize(CheckpointOut & cp) const
2584 Gicv3CPUInterface::unserialize(CheckpointIn & cp)