Lines Matching refs:bits
114 /** Mask off SGI's when setting/clearing pending bits */
117 /** Mask for bits that config N:N mode in GICD_ICFGR's */
182 * interrupt enable bits for first 32 interrupts, 1b per interrupt */
186 * interrupt pending bits for first 32 interrupts, 1b per interrupt */
190 * interrupt active bits for first 32 interrupts, 1b per interrupt */
194 * interrupt group bits for first 32 interrupts, 1b per interrupt */
214 * interrupt enable bits for global interrupts
215 * 1b per interrupt, 32 bits per word, 31 words */
227 * interrupt pending bits for global interrupts
228 * 1b per interrupt, 32 bits per word, 31 words */
241 * interrupt active bits for global interrupts
242 * 1b per interrupt, 32 bits per word, 31 words */
255 * interrupt group bits for global interrupts
256 * 1b per interrupt, 32 bits per word, 31 words */
293 return bits(intConfig[intNumToWord(ix * 2)], cfg_hi, cfg_low);
329 return bits(getIntConfig(ctx, ix), 1) == 0;
335 return !bits(group_reg, intNumToBit(int_num));
384 * id and bits in position is destination id. e.g. 0x4 = CPU 0 generated
390 * 16 SGI pending bits for each of the (large number of) CPUs.
395 /** One bit per private peripheral interrupt. Only upper 16 bits