src/cpu/simple_thread.hh

98     typedef TheISA::MachInst MachInst;
99     using VecRegContainer = TheISA::VecRegContainer;
100     using VecElem = TheISA::VecElem;
101     using VecPredRegContainer = TheISA::VecPredRegContainer;
106     RegVal floatRegs[TheISA::NumFloatRegs];
107     RegVal intRegs[TheISA::NumIntRegs];
108     VecRegContainer vecRegs[TheISA::NumVecRegs];
109     VecPredRegContainer vecPredRegs[TheISA::NumVecPredRegs];
111     RegVal ccRegs[TheISA::NumCCRegs];
113     TheISA::ISA *const isa;    // one "instance" of the current ISA.
115     TheISA::PCState _pcState;
134     TheISA::Decoder decoder;
139                  BaseTLB *_itb, BaseTLB *_dtb, TheISA::ISA *_isa,
144                  TheISA::ISA *_isa);
206     TheISA::ISA *getIsaPtr() override { return isa; }
208     TheISA::Decoder *getDecoderPtr() override { return &decoder; }
269         for (int i = 0; i < TheISA::NumVecRegs; i++) {
272         for (int i = 0; i < TheISA::NumVecPredRegs; i++) {
288         assert(flatIndex < TheISA::NumIntRegs);
299         assert(flatIndex < TheISA::NumFloatRegs);
310         assert(flatIndex < TheISA::NumVecRegs);
321         assert(flatIndex < TheISA::NumVecRegs);
336         assert(flatIndex < TheISA::NumVecRegs);
377         assert(flatIndex < TheISA::NumVecRegs);
411         assert(flatIndex < TheISA::NumVecRegs);
422         assert(flatIndex < TheISA::NumVecPredRegs);
433         assert(flatIndex < TheISA::NumVecPredRegs);
447         assert(flatIndex < TheISA::NumCCRegs);
462         assert(flatIndex < TheISA::NumIntRegs);
472         assert(flatIndex < TheISA::NumFloatRegs);
475         if (flatIndex < TheISA::NumFloatRegs)
485         assert(flatIndex < TheISA::NumVecRegs);
495         assert(flatIndex < TheISA::NumVecRegs);
505         assert(flatIndex < TheISA::NumVecPredRegs);
516         assert(flatIndex < TheISA::NumCCRegs);
525     TheISA::PCState pcState() const override { return _pcState; }
526     void pcState(const TheISA::PCState &val) override { _pcState = val; }
529     pcStateNoRecord(const TheISA::PCState &val) override
655         return vecRegs[reg].as<TheISA::VecElem>()[elemIndex];
662         vecRegs[reg].as<TheISA::VecElem>()[elemIndex] = val;