cpu/simple/timing.cc

264     const RequestPtr &req = pkt->req;
268     if (pkt->isRead() && pkt->req->isLLSC()) {
269         TheISA::handleLockedRead(thread, pkt->req);
271     if (req->isMmappedIpr()) {
288 TimingSimpleCPU::sendData(const RequestPtr &req, uint8_t *data, uint64_t *res,
294     PacketPtr pkt = buildPacket(req, read);
297     if (req->getFlags().isSet(Request::NO_ACCESS)) {
306         if (req->isLLSC()) {
307             do_access = TheISA::handleLockedWrite(thread, req, dcachePort.cacheBlockMask);
308         } else if (req->isCondSwap()) {
310             req->setExtraData(*res);
326                                const RequestPtr &req, uint8_t *data, bool read)
329     buildSplitPacket(pkt1, pkt2, req1, req2, req, data, read);
330     if (req->getFlags().isSet(Request::NO_ACCESS)) {
381 TimingSimpleCPU::buildPacket(const RequestPtr &req, bool read)
383     return read ? Packet::createRead(req) : Packet::createWrite(req);
388         const RequestPtr &req1, const RequestPtr &req2, const RequestPtr &req,
395     if (req->getFlags().isSet(Request::NO_ACCESS)) {
396         pkt1 = buildPacket(req, read);
403     PacketPtr pkt = new Packet(req, pkt1->cmd.responseCommand());
435     RequestPtr req = std::make_shared<Request>(
439         req->setByteEnable(byteEnable);
442     req->taskId(taskId());
450         assert(!req->isLLSC() && !req->isSwap());
451         req->splitOnVaddr(split_addr, req1, req2);
454             new WholeTranslationState(req, req1, req2, new uint8_t[size],
465             new WholeTranslationState(req, new uint8_t[size], NULL, mode);
468         thread->dtb->translateTiming(req, thread->getTC(), translation, mode);
480     const RequestPtr &req = dcache_pkt->req;
481     if (req->isMmappedIpr()) {
521     RequestPtr req = std::make_shared<Request>(
525         req->setByteEnable(byteEnable);
528     req->taskId(taskId());
540         assert(!req->isLLSC() && !req->isSwap());
541         req->splitOnVaddr(split_addr, req1, req2);
544             new WholeTranslationState(req, req1, req2, newData, res, mode);
554             new WholeTranslationState(req, newData, res, mode);
557         thread->dtb->translateTiming(req, thread->getTC(), translation, mode);
581     RequestPtr req = make_shared<Request>(asid, addr, size, flags,
585     assert(req->hasAtomicOpFunctor());
587     req->taskId(taskId());
605         new WholeTranslationState(req, new uint8_t[size], NULL, mode);
608     thread->dtb->translateTiming(req, thread->getTC(), translation, mode);
697 TimingSimpleCPU::sendFetch(const Fault &fault, const RequestPtr &req,
702                 req->getVaddr(), req->getPaddr());
703         ifetch_pkt = new Packet(req, MemCmd::ReadReq);
717         DPRINTF(SimpleCPU, "Translation of addr %#x faulted\n", req->getVaddr());
792         pkt->req->setAccessLatency();
884            pkt->req->getFlags().isSet(Request::NO_ACCESS));
886     pkt->req->setAccessLatency();