Lines Matching defs:const
200 TimingSimpleCPU::verifyMemoryMode() const
264 const RequestPtr &req = pkt->req;
288 TimingSimpleCPU::sendData(const RequestPtr &req, uint8_t *data, uint64_t *res,
325 TimingSimpleCPU::sendSplitData(const RequestPtr &req1, const RequestPtr &req2,
326 const RequestPtr &req, uint8_t *data, bool read)
362 TimingSimpleCPU::translationFault(const Fault &fault)
381 TimingSimpleCPU::buildPacket(const RequestPtr &req, bool read)
388 const RequestPtr &req1, const RequestPtr &req2, const RequestPtr &req,
421 const std::vector<bool>& byteEnable)
427 const int asid = 0;
428 const Addr pc = thread->instAddr();
480 const RequestPtr &req = dcache_pkt->req;
499 const std::vector<bool>& byteEnable)
505 const int asid = 0;
506 const Addr pc = thread->instAddr();
573 const int asid = 0;
574 const Addr pc = thread->instAddr();
697 TimingSimpleCPU::sendFetch(const Fault &fault, const RequestPtr &req,
729 TimingSimpleCPU::advanceInst(const Fault &fault)
939 const Cycles delta(curCycle() - previousCycle);
1060 const char *
1061 TimingSimpleCPU::IprEvent::description() const