Lines Matching refs:t_info

171     SimpleExecContext& t_info = *threadInfo[curThread];
174 t_info.numInst++;
175 t_info.numInsts++;
178 t_info.thread->funcExeInst++;
180 t_info.numOp++;
181 t_info.numOps++;
188 for (auto& t_info : threadInfo) {
189 total_inst += t_info->numInst;
199 for (auto& t_info : threadInfo) {
200 total_op += t_info->numOp;
227 SimpleExecContext& t_info = *threadInfo[tid];
233 t_info.numInsts
238 t_info.numOps
243 t_info.numIntAluAccesses
248 t_info.numFpAluAccesses
253 t_info.numVecAluAccesses
258 t_info.numCallsReturns
263 t_info.numCondCtrlInsts
268 t_info.numIntInsts
273 t_info.numFpInsts
278 t_info.numVecInsts
283 t_info.numIntRegReads
288 t_info.numIntRegWrites
293 t_info.numFpRegReads
298 t_info.numFpRegWrites
303 t_info.numVecRegReads
308 t_info.numVecRegWrites
313 t_info.numCCRegReads
319 t_info.numCCRegWrites
325 t_info.numMemRefs
330 t_info.numStoreInsts
335 t_info.numLoadInsts
340 t_info.notIdleFraction
345 t_info.idleFraction
350 t_info.numBusyCycles
355 t_info.numIdleCycles
360 t_info.icacheStallCycles
363 .prereq(t_info.icacheStallCycles)
366 t_info.dcacheStallCycles
369 .prereq(t_info.dcacheStallCycles)
372 t_info.statExecutedInstType
380 t_info.statExecutedInstType.subname(i, Enums::OpClassStrings[i]);
383 t_info.idleFraction = constant(1.0) - t_info.notIdleFraction;
384 t_info.numIdleCycles = t_info.idleFraction * numCycles;
385 t_info.numBusyCycles = t_info.notIdleFraction * numCycles;
387 t_info.numBranches
390 .prereq(t_info.numBranches);
392 t_info.numPredictedBranches
395 .prereq(t_info.numPredictedBranches);
397 t_info.numBranchMispred
400 .prereq(t_info.numBranchMispred);
451 SimpleExecContext&t_info = *threadInfo[curThread];
452 SimpleThread* thread = t_info.thread;
459 t_info.fetchOffset = 0;
471 SimpleExecContext &t_info = *threadInfo[curThread];
472 SimpleThread* thread = t_info.thread;
475 Addr fetchPC = (instAddr & PCMask) + t_info.fetchOffset;
488 SimpleExecContext &t_info = *threadInfo[curThread];
489 SimpleThread* thread = t_info.thread;
498 t_info.setPredicate(true);
499 t_info.setMemAccPredicate(true);
502 comInstEventQueue[curThread]->serviceEvents(t_info.numInst);
511 t_info.stayAtPC = false;
522 Addr fetchPC = (pcState.instAddr() & PCMask) + t_info.fetchOffset;
532 t_info.stayAtPC = false;
535 t_info.stayAtPC = true;
536 t_info.fetchOffset += sizeof(MachInst);
569 t_info.predPC = thread->pcState();
571 branchPred->predict(curStaticInst, cur_sn, t_info.predPC,
575 ++t_info.numPredictedBranches;
582 SimpleExecContext &t_info = *threadInfo[curThread];
583 SimpleThread* thread = t_info.thread;
599 t_info.numMemRefs++;
603 ++t_info.numLoad;
604 comLoadEventQueue[curThread]->serviceEvents(t_info.numLoad);
612 ++t_info.numBranches;
618 t_info.numIntAluAccesses++;
619 t_info.numIntInsts++;
624 t_info.numFpAluAccesses++;
625 t_info.numFpInsts++;
630 t_info.numVecAluAccesses++;
631 t_info.numVecInsts++;
636 t_info.numCallsReturns++;
641 t_info.numCondCtrlInsts++;
646 t_info.numLoadInsts++;
650 t_info.numStoreInsts++;
654 t_info.statExecutedInstType[curStaticInst->opClass()]++;
672 SimpleExecContext &t_info = *threadInfo[curThread];
673 SimpleThread* thread = t_info.thread;
678 t_info.fetchOffset = 0;
698 if (t_info.predPC == thread->pcState()) {
704 ++t_info.numBranchMispred;
713 for (auto& t_info : threadInfo)
714 t_info->thread->startup();