src/cpu/reg_class.hh

82     RegClass regClass;
97         : regClass(reg_class), regIdx(reg_idx), elemIdx(elem_idx),
100             panic_if(regClass == VecElemClass,
103             panic_if(regClass != VecElemClass,
109         return regClass == that.classValue() && regIdx == that.index()
121         return regClass < that.classValue() ||
122             (regClass == that.classValue() && (
132         return regClass != MiscRegClass;
143         return ((regClass == IntRegClass && regIdx == TheISA::ZeroReg) ||
144                (THE_ISA == ALPHA_ISA && regClass == FloatRegClass &&
149     bool isIntReg() const { return regClass == IntRegClass; }
152     bool isFloatReg() const { return regClass == FloatRegClass; }
155     bool isVecReg() const { return regClass == VecRegClass; }
158     bool isVecElem() const { return regClass == VecElemClass; }
161     bool isVecPredReg() const { return regClass == VecPredRegClass; }
164     bool isCCReg() const { return regClass == CCRegClass; }
167     bool isMiscReg() const { return regClass == MiscRegClass; }
174         return regClass != MiscRegClass;
187         switch (regClass) {
206     const RegClass& classValue() const { return regClass; }
208     const char* className() const { return regClassStrings[regClass]; }
363         const size_t class_num = static_cast<size_t>(reg_id.regClass);