Lines Matching defs:const

161         virtual bool isSnooping() const { return true; }
277 void setState(const State& newState) { _state = newState; }
290 const DynInstPtr _inst;
297 const Addr _addr;
298 const uint32_t _size;
299 const Request::Flags _flags;
305 LSQRequest(LSQUnit* port, const DynInstPtr& inst, bool isLoad) :
317 LSQRequest(LSQUnit* port, const DynInstPtr& inst, bool isLoad,
318 const Addr& addr, const uint32_t& size,
319 const Request::Flags& flags_,
339 isLoad() const
345 isAtomic() const
362 squashed() const override
409 const std::vector<bool>& byteEnable)
445 setContext(const ContextID& context_id)
450 const DynInstPtr&
467 taskId(const uint32_t& v)
474 uint32_t taskId() const { return _taskId; }
477 const RequestPtr
478 request(int idx = 0) const
483 Addr getVaddr(int idx = 0) const { return request(idx)->getVaddr(); }
512 const LSQSenderState*
513 senderState() const
542 isSplit() const
720 SingleDataRequest(LSQUnit* port, const DynInstPtr& inst, bool isLoad,
721 const Addr& addr, const uint32_t& size,
722 const Request::Flags& flags_,
731 virtual void finish(const Fault &fault, const RequestPtr &req,
779 SplitDataRequest(LSQUnit* port, const DynInstPtr& inst, bool isLoad,
780 const Addr& addr, const uint32_t& size,
781 const Request::Flags & flags_,
803 virtual void finish(const Fault &fault, const RequestPtr &req,
823 std::string name() const;
832 void drainSanityCheck() const;
834 bool isDrained() const;
845 void insertLoad(const DynInstPtr &load_inst);
847 void insertStore(const DynInstPtr &store_inst);
850 Fault executeLoad(const DynInstPtr &inst);
853 Fault executeStore(const DynInstPtr &inst);
879 squash(const InstSeqNum &squashed_num, ThreadID tid)
958 bool isEmpty() const;
960 bool lqEmpty() const;
962 bool sqEmpty() const;
1004 void dumpInsts() const;
1006 void dumpInsts(ThreadID tid) const { thread.at(tid).dumpInsts(); }
1034 Fault pushRequest(const DynInstPtr& inst, bool isLoad, uint8_t *data,
1037 const std::vector<bool>& byteEnable);
1046 bool cacheBlocked() const;
1050 bool cachePortAvailable(bool is_load) const;