Lines Matching defs:instruction

123     // Get the size of an instruction.
632 // Setup the memReq to do a read of the first instruction's address.
693 DPRINTF(Fetch, "Fetch: Doing instruction read.\n");
718 // Don't send an instruction to decode if we can't handle it.
739 DynInstPtr instruction = buildInst(tid, StaticInst::nopStaticInstPtr,
741 instruction->setNotAnInst();
743 instruction->setPredTarg(fetchPC);
744 instruction->fault = fault;
971 DPRINTF(Fetch, "[tid:%i] [sn:%llu] Sending instruction to decode "
993 // Reset the number of the instruction we've fetched.
1022 // If it was a branch mispredict on a control instruction, update the
1023 // branch predictor with that instruction, otherwise just kill the
1038 // Update the branch predictor if it wasn't a squashed instruction
1111 // Create a new DynInst from the instruction fetched.
1112 DynInstPtr instruction =
1114 instruction->setTid(tid);
1116 instruction->setASID(tid);
1118 instruction->setThreadState(cpu->thread[tid]);
1125 instruction->staticInst->
1130 instruction->traceData =
1132 instruction->staticInst, thisPC, curMacroop);
1135 instruction->traceData = NULL;
1138 // Add instruction to the CPU's list of instructions.
1139 instruction->setInstListIt(cpu->addInst(instruction));
1141 // Write the instruction to the first slot in the queue
1144 fetchQueue[tid].push_back(instruction);
1148 //toDecode->insts[toDecode->size++] = instruction;
1151 delayedCommit[tid] = instruction->isDelayedCommit();
1153 return instruction;
1206 "instruction, starting at PC %s.\n", tid, thisPC);
1242 // If the read of the first instruction was successful, then grab the
1253 // Need to halt fetch if quiesce instruction detected
1262 // Loop through instruction memory from the cache.
1314 // We need more bytes for this instruction so blkOffset and
1333 DynInstPtr instruction =
1337 ppFetch->notify(instruction);
1342 instruction->fetchTick = curTick();
1348 // If we're branching after this instruction, quit fetching
1352 lookupAndUpdateNextPC(instruction, nextPC);
1359 // Move to the next instruction, unless we have a branch.
1370 if (instruction->isQuiesce()) {
1372 "Quiesce instruction encountered, halting fetch!\n");
1382 // Re-evaluate whether the next instruction to fetch is in micro-op ROM
1389 "instruction encountered.\n", tid);
1661 "instruction!\n", tid);