cpu/o3/cpu.hh

180     void drainSanityCheck() const;
183     bool isCpuDrained() const;
243     Counter totalInsts() const override;
246     Counter totalOps() const override;
263     bool isDraining() const { return drainState() == DrainState::Draining; }
265     void serializeThread(CheckpointOut &cp, ThreadID tid) const override;
272     bool isThreadExiting(ThreadID tid) const;
311     void verifyMemoryMode() const override;
318     void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
332     void processInterrupts(const Fault &interrupt);
340     RegVal readMiscRegNoEffect(int misc_reg, ThreadID tid) const;
359     const VecRegContainer& readVecReg(PhysRegIdPtr reg_idx) const;
367     Enums::VecRegRenameMode vecRenameMode() const { return vecMode; }
378     readVecLane(PhysRegIdPtr phys_reg) const
389     readVecLane(PhysRegIdPtr phys_reg) const
398     setVecLane(PhysRegIdPtr phys_reg, const LD& val)
404     const VecElem& readVecElem(PhysRegIdPtr reg_idx) const;
406     const VecPredRegContainer& readVecPredReg(PhysRegIdPtr reg_idx) const;
416     void setVecReg(PhysRegIdPtr reg_idx, const VecRegContainer& val);
418     void setVecElem(PhysRegIdPtr reg_idx, const VecElem& val);
420     void setVecPredReg(PhysRegIdPtr reg_idx, const VecPredRegContainer& val);
428     const VecRegContainer& readArchVecReg(int reg_idx, ThreadID tid) const;
435     readArchVecLane(int reg_idx, int lId, ThreadID tid) const
446     setArchVecLane(int reg_idx, int lId, ThreadID tid, const LD& val)
453     const VecElem& readArchVecElem(const RegIndex& reg_idx,
454                                    const ElemIndex& ldx, ThreadID tid) const;
456     const VecPredRegContainer& readArchVecPredReg(int reg_idx,
457                                                   ThreadID tid) const;
472     void setArchVecPredReg(int reg_idx, const VecPredRegContainer& val,
475     void setArchVecReg(int reg_idx, const VecRegContainer& val, ThreadID tid);
477     void setArchVecElem(const RegIndex& reg_idx, const ElemIndex& ldx,
478                         const VecElem& val, ThreadID tid);
483     void pcState(const TheISA::PCState &newPCState, ThreadID tid);
506     ListIt addInst(const DynInstPtr &inst);
509     void instDone(ThreadID tid, const DynInstPtr &inst);
514     void removeFrontInst(const DynInstPtr &inst);
521     void removeInstsUntil(const InstSeqNum &seq_num, ThreadID tid);
524     inline void squashInstIt(const ListIt &instIt, ThreadID tid);
660     void activateStage(const StageIdx idx)
664     void deactivateStage(const StageIdx idx)
714     Fault pushRequest(const DynInstPtr& inst, bool isLoad, uint8_t *data,
717                       const std::vector<bool>& byteEnable =