cpu/minor/lsq.cc

255     DPRINTF(MinorMem, "Moving %s barrier out of store buffer inst: %s\n",
722     /* @todo, support store amalgamation */
744         warn("%s: store buffer insertion without space to insert from"
748     DPRINTF(MinorMem, "Pushing store: %s into store buffer\n", request);
758      *  the store buffer */
770     /* Traverse the store buffer in reverse order (most to least recent)
775         /* Cache maintenance instructions go down via the store path but
811     LSQRequestPtr store = slots[slot_number];
813     assert(store->packet);
814     assert(store->containsAddrRangeOf(load) == FullAddrRangeCoverage);
817     Addr store_addr = store->request->getPaddr();
822     DPRINTF(MinorMem, "Forwarding %d bytes for addr: 0x%x from store buffer"
828     void *store_packet_data = store->packet->getPtr<uint8_t>() + addr_offset;
901                     /* Don't step on to the next store buffer entry if this
902                      *  one hasn't issued all its packets as the store
917         /* Not already sent to the store buffer as a store request? */
919             /* Insert an entry into the store buffer to tick off barriers
1041         /* Store.  Can it be sent to the store buffer? */
1045             DPRINTF(MinorMem, "Moving store into transfers queue\n");
1073                 " from the store buffer, but need to wait for store buffer"
1086         /* Check for match in the store buffer */
1095                 /* Forward data from the store buffer into this request and
1104                 DPRINTF(MinorMem, "Load partly satisfied by store buffer"
1105                     " data. Must wait for the store to complete\n");
1109                 DPRINTF(MinorMem, "No forwardable data from store buffer\n");
1134                     "access for store conditional\n");
1224                 /* Fully or partially issued a request in the store
1269      *  queue so that loads know when their store buffer forwarding
1271      *  have reached the store buffer) */
1316         /* Response to a request from the store buffer */
1359         /* Retry in the store buffer */
1382             /* In the store buffer */
1484         /* Same instruction and complete access or a store that's
1485          *  capable of being moved to the store buffer */
1526             (response->isLoad ? "load" : "store"),
1538     DPRINTF(MinorMem, "Sending store: %s to store buffer\n",
1606         (isLoad ? "load" : "store/atomic"), addr, size, flags,
1615             /* For atomic or store-no-data, just use zeroed data */