Lines Matching refs:TheISA
101 thread.setIntReg(TheISA::ZeroReg, 0);
103 thread.setFloatReg(TheISA::ZeroReg, 0);
159 const TheISA::VecRegContainer &
167 TheISA::VecRegContainer &
175 TheISA::VecElem
183 const TheISA::VecPredRegContainer&
191 TheISA::VecPredRegContainer&
217 const TheISA::VecRegContainer& val) override
226 const TheISA::VecPredRegContainer& val) override
312 const TheISA::VecElem val) override
343 TheISA::PCState
350 pcState(const TheISA::PCState &val) override