x86/regs/misc.hh

404     isValidMiscReg(int index)
406         return (index >= MISCREG_CR0 && index < NUM_MISCREGS &&
407                 index != MISCREG_CR1 &&
408                 !(index > MISCREG_CR4 && index < MISCREG_CR8) &&
409                 !(index > MISCREG_CR8 && index <= MISCREG_CR15));
413     MISCREG_CR(int index)
415         assert(index >= 0 && index < NumCRegs);
416         return (MiscRegIndex)(MISCREG_CR_BASE + index);
420     MISCREG_DR(int index)
422         assert(index >= 0 && index < NumDRegs);
423         return (MiscRegIndex)(MISCREG_DR_BASE + index);
427     MISCREG_MTRR_PHYS_BASE(int index)
429         assert(index >= 0 && index < (MISCREG_MTRR_PHYS_BASE_END -
431         return (MiscRegIndex)(MISCREG_MTRR_PHYS_BASE_BASE + index);
435     MISCREG_MTRR_PHYS_MASK(int index)
437         assert(index >= 0 && index < (MISCREG_MTRR_PHYS_MASK_END -
439         return (MiscRegIndex)(MISCREG_MTRR_PHYS_MASK_BASE + index);
443     MISCREG_MC_CTL(int index)
445         assert(index >= 0 && index < (MISCREG_MC_CTL_END -
447         return (MiscRegIndex)(MISCREG_MC_CTL_BASE + index);
451     MISCREG_MC_STATUS(int index)
453         assert(index >= 0 && index < (MISCREG_MC_STATUS_END -
455         return (MiscRegIndex)(MISCREG_MC_STATUS_BASE + index);
459     MISCREG_MC_ADDR(int index)
461         assert(index >= 0 && index < (MISCREG_MC_ADDR_END -
463         return (MiscRegIndex)(MISCREG_MC_ADDR_BASE + index);
467     MISCREG_MC_MISC(int index)
469         assert(index >= 0 && index < (MISCREG_MC_MISC_END -
471         return (MiscRegIndex)(MISCREG_MC_MISC_BASE + index);
475     MISCREG_PERF_EVT_SEL(int index)
477         assert(index >= 0 && index < (MISCREG_PERF_EVT_SEL_END -
479         return (MiscRegIndex)(MISCREG_PERF_EVT_SEL_BASE + index);
483     MISCREG_PERF_EVT_CTR(int index)
485         assert(index >= 0 && index < (MISCREG_PERF_EVT_CTR_END -
487         return (MiscRegIndex)(MISCREG_PERF_EVT_CTR_BASE + index);
491     MISCREG_IORR_BASE(int index)
493         assert(index >= 0 && index < (MISCREG_IORR_BASE_END -
495         return (MiscRegIndex)(MISCREG_IORR_BASE_BASE + index);
499     MISCREG_IORR_MASK(int index)
501         assert(index >= 0 && index < (MISCREG_IORR_MASK_END -
503         return (MiscRegIndex)(MISCREG_IORR_MASK_BASE + index);
507     MISCREG_SEG_SEL(int index)
509         assert(index >= 0 && index < NUM_SEGMENTREGS);
510         return (MiscRegIndex)(MISCREG_SEG_SEL_BASE + index);
514     MISCREG_SEG_BASE(int index)
516         assert(index >= 0 && index < NUM_SEGMENTREGS);
517         return (MiscRegIndex)(MISCREG_SEG_BASE_BASE + index);
521     MISCREG_SEG_EFF_BASE(int index)
523         assert(index >= 0 && index < NUM_SEGMENTREGS);
524         return (MiscRegIndex)(MISCREG_SEG_EFF_BASE_BASE + index);
528     MISCREG_SEG_LIMIT(int index)
530         assert(index >= 0 && index < NUM_SEGMENTREGS);
531         return (MiscRegIndex)(MISCREG_SEG_LIMIT_BASE + index);
535     MISCREG_SEG_ATTR(int index)
537         assert(index >= 0 && index < NUM_SEGMENTREGS);
538         return (MiscRegIndex)(MISCREG_SEG_ATTR_BASE + index);
722         /*uint64_t pb(int index)
724             return bits(__data, index + 2);
739         /*uint64_t type(int index)
741             return bits(__data, index * 8 + 7, index * 8);
746         /*uint64_t pa(int index)
748             return bits(__data, index * 8 + 2, index * 8);
775         /*uint64_t en(int index)
777             return bits(__data, index);